Folders Files
/mr_ce.v
/mr_hdmi_tx_core_top.v
/mr_tx_oversample.v
i2c_master
/i2c_master_bit_ctrl.v
/i2c_master_byte_ctrl.v
/i2c_master_defines.v
/i2c_master_top.v
/oc_i2c_master.v
/oc_i2c_master_hw.tcl
/timescale.v
i2c_slave •
/edid_ram.qsys (Intel Quartus Prime Standard Edition)
•
/edid_ram.ip (Intel Quartus Prime Pro Edition)
/I2Cslave.v
•
/output_buf_i2c.qsys (Intel Quartus Prime Standard Edition)
•
/output_buf_i2c.ip (Intel Quartus Prime Pro Edition)
/Panasonic.hex
/i2c_avl_mst_intf_gen.v
/i2c_clk_cnt.v
/i2c_condt_det.v
/i2c_databuffer.v
/i2c_rxshifter.v
/i2c_slvfsm.v
/i2c_spksupp.v
/i2c_txout.v
/i2c_txshifter.v
/i2cslave_to_avlmm_bridge.v
pll •
/pll_hdmi.qsys (Intel Quartus Prime Standard Edition)
•
/pll_hdmi.ip (Intel Quartus Prime Pro Edition)
•
/pll_hdmi_reconfig.qsys (Intel Quartus Prime Standard Edition)
•
/pll_hdmi_reconfig.ip (Intel Quartus Prime Pro Edition)
common
/reset_controller (Intel Quartus Prime Pro Edition)
hdr
/altera_hdmi_aux_hdr.v
/altera_hdmi_aux_snk.v
/altera_hdmi_aux_src.v
/altera_hdmi_hdr_infoframe.v
/avalon_st_mutiplexer.v
continued...
1 Intel
®
FPGA HDMI Design Example Quick Start Guide for Intel
®
Arria
®
10 Devices
UG-20077 | 2017.11.06
Intel
®
FPGA HDMI Design Example User Guide for Intel
®
Arria 10 Devices
5