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Intel Q9300 - Core 2 Quad 2.5 GHz 6M L2 Cache 1333MHz FSB LGA775 Quad-Core Processor - Platform Environment Control Interface (PECI); Introduction; TCONTROL and TCC Activation on PECI-Based Systems; Conceptual Fan Control Diagram on PECI-Based Platforms

Intel Q9300 - Core 2 Quad 2.5 GHz 6M L2 Cache 1333MHz FSB LGA775 Quad-Core Processor
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Datasheet 85
Thermal Specifications and Design Considerations
5.3 Platform Environment Control Interface (PECI)
5.3.1 Introduction
PECI offers an interface for thermal monitoring of Intel processor and chipset
components. It uses a single wire, thus alleviating routing congestion issues. PECI uses
CRC checking on the host side to ensure reliable transfers between the host and client
devices. Also, data transfer speeds across the PECI interface are negotiable within a
wide range (2Kbps to 2Mbps). The PECI interface on the processor is disabled by
default and must be enabled through BIOS. More information can be found in the
Platform Environment Control Interface (PECI) Specification.
5.3.1.1 T
CONTROL
and TCC activation on PECI-Based Systems
Fan speed control solutions based on PECI utilize a T
CONTROL
value stored in the
processor IA32_TEMPERATURE_TARGET MSR. The T
CONTROL
MSR uses the same offset
temperature format as PECI though it contains no sign bit. Thermal management
devices should infer the T
CONTROL
value as negative. Thermal management algorithms
should utilize the relative temperature value delivered over PECI in conjunction with the
T
CONTROL
MSR value to control or optimize fan speeds. Figure 5-7 shows a conceptual
fan control diagram using PECI temperatures.
The relative temperature value reported over PECI represents the delta below the onset
of thermal control circuit (TCC) activation as indicated by PROCHOT# assertions. As the
temperature approaches TCC activation, the PECI value approaches zero. TCC activates
at a PECI count of zero.
Figure 5-7. Conceptual Fan Control Diagram on PECI-Based Platforms

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