Intel S2600GL

System Event Log Troubleshooting Guide for EPSD Platforms Based on Intel
®
Xeon
®
Processor E5 4600/2600/2400/1600/1400 Product Families
Memory Subsystem
Revision 1.1 Intel order number G90620-002 73
Byte
Field
Description
16
Event Data 3
Selected RAS Mode
[7:4] = Reserved
[3:0] = RAS Mode
0h = None (Independent Channel Mode)
1h = Mirroring Mode
2h = Lockstep Mode
4h = Rank Sparing Mode
7.3 Mirroring Redundancy State
Mirroring Mode protects memory data by full redundancy – keeping complete copies of all data on both channels of a Mirroring
Domain (channel pair). If an Uncorrectable Error, which is normally fatal, occurs on one channel of a pair, and the other channel is
still intact and operational, then the Uncorrectable Error is “demoted” to a Correctable Error, and the failed channel is disabled.
Because the Mirror Domain is no longer redundant, a Mirroring Redundancy State SEL Event is logged.
Table 61: Mirroring Redundancy State Sensor Typical Characteristics
Byte
Field
Description
8
9
Generator ID
0033h = BIOS SMI Handler
11
Sensor Type
0ch = Memory
12
Sensor Number
01h
13
Event Direction and
Event Type
[7] Event direction
0b = Assertion Event
1b = Deassertion Event
[6:0] Event Type = 0Bh (Generic Discrete)
14
Event Data 1
[7:6] – 10b = OEM code in Event Data 2
[5:4] – 10b = OEM code in Event Data 3
[3:0] – Event Trigger Offset
0h = Fully Redundant
2h = Redundancy Degraded