JVC RX-DP10VBK - Page 17

RX-DP10VBK/RX-DP10VSL
RX-DP10RSL
1-17
3.Block diagram
Input
Selector
AVSS
RX1
RX2
RX3
RX4
CSN
CCLK
CDTO
CDTI
LRCK
BICK
SDTO
TVDD
FS96
DAUX
DVDD
DVSS
V/TX
PDN
AUTO ERF P/S="L"
AVDD R MCKO1 MCKO2 XTI XTO
Clock
Recovery
X'tal
Oscillator
96kHz
Detect
DAIF
Decoder
AC-3/MPEG
Detect
DEM
Audio
I/F
System
Control
Serial Control Mode
Clock
Generator
Error
Detect
p I/F
AVSS
RX1
LRCK
BICK
SDTO
DIF0
DIF1
DIF2
TVDD
FS96
DAUX
DVDD
DVSS
V
OCKS0
OCKS1
CM0
CM1
PDN
OCKS0
OCKS1
CM0
CM1
AUTO ERF P/S="H"
AVDD R MCKO1 MCKO2 XTI XTO
Clock
Recovery
X'tal
Oscillator
96kHz
Detect
DAIF
Decoder
AC-3/MPEG
Detect
DEM
Audio
I/F
System
Control
Parallel Control Mode
Clock
Generator
Error
Detect
4