LG HDR676X - Main Block Diagram ( Scart Model Only )

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13. MAIN BLOCK DIAGRAM ( SCART MODEL ONLY )
EPG
BLOCK
SIO_SPI_CS0
SIO_SPI_MOSI
SIO_SPI_CLK
IC1201
MX29LV640MT
TC-90
FLASH
MEMORY
IC1202
HYB25D512
160CE-5
DDR
SDRAM
E5_SDRAM_DQS[1:0]
E5_SDRAM_DQM[1:0
]
E5_SDRAM_C
LK1
E5_SDRAM_C
LK#1
E5_SDRAM_DQ[15:0
]
E5_SDRAM_A[13:0]
E5_SDRAM_W
E#
E5_SDRAM_CAS#
E5_SDRAM_RAS#
E5_SDRAM_CLKE
E5_SDRAM_BA[1:0]
ATAPI1_D[15:0]
ATAPI1_ADD[4:0]
/RST_ATAPI1
ATAPI1_DMARQ
ATAPI1_DIOW_L
ATAPI1_DIOR_L
ATAPI1_IORDY
ATAPI1_DMAACK_L
ATAPI1_INTRQ
ATAPI2_D[15:0]
ATAPI2_ADD[4:0]
/RST_ATAPI2
ATAPI2_DMARQ
ATAPI2_DIOW_L
ATAPI2_DIOR_L
ATAPI2_IORDY
ATAPI2_DMAACK_L
ATAPI2_INTRQ
HD
[15:0]
HD
[15:0]
E5_ALE
HA
[21:6]
HA[5:1][
23:22]
/E5_OE
/E5_CS0
HD[15:0]
HA20
3.3V
/RST_HOST
3.3V
/RST_E5/FLASH
/RST_SYSTEM
BERG_WE
HD[7:0]
HD[15:0]
IC1503
74LVC541A
HA20,HA[18:16]
/E5_OE
/HA20
/E5_LWEn
IC1306
74LVC08
HATA_A[2:0]
/HATA_CS[1:0]
HATA_DIOR
HATA_DIOW
HATA_IRQ
/WAIT
/RST_HATA
IC1401
TSB41AB
1
VO_D[15:0]
SCL
SD
A
AOUT_IEC958
AOUT_MCLKOUT
SiL9030_INT
VOUT_CLK
E5_ALE
/WAIT
/ETHERNET_IRQ
/E5_OE
/E5_LWEn
/E5_CS1
HD[15:0]
/RST_SYSTEM
/RST_SiL9030
HDMI_I2C_EN
1394_PD
/RST_PHY
PHY_LINK
ON
PHY_LPS
PHY_LR
EQ
PH
Y_CLK
PHY_CTL[1:0]
PHY_DATA[7:0]
DV
JAC
K
TPA+
TPA-
TPB+
TPB-
IC1302
74LVT273
SIO_SPI_MISO
SPI_CLK
SPI_CS
SPI_MOSI
SPI_MISO
IC701
MN101DF10GAF
MICOM
LOADER
INTERFACE
PML07
HDD
INTERFACE
PML08
MEMORY CARD
INTERFACE
PMC09
ETHERNET
INTERFACE
PMX06
HDMI
INTERFACE
PMH10
/E5_LWEn
IC1101
DMN8653
LSI
IC1101
DMN8653
LSI
I/O BOARD
VREF
/RST_EPG
/RST_SAA7137
PMX03
PC DEBUGGING
UAR
T
UART2_CTS
UART2_RTS
UART2_TX
UART2_RX
HA[5:1][23:22]
/E5_OE
/E5_CS0
/E5_LWEn
HD[15:0]
E5_ALE
/RST_E5/FLASH
/E5_CS3
/E5_CS2
HATA_IRQ
/WAI
T
HA[5:1]
IC1204
G2995
/E5_LWEn
/BERG_WE
IC1305
74LVC04
HD[15:0]
HD[15:0]
IC901
SAA7137
AV DECODER
IC701 MICOM
IC1301
74LVT16373
Address
LATCH