Linear Technology LTC6804-1 - Page 37

LTC6804-1/LTC6804-2
37
680412fc
For more information www.linear.com/LTC6804-1
operaTion
Figure 15. Timing Diagram of 4-Wire Serial Peripheral Interface
Figure 16. isoSPI Interface
Figure 16 illustrates how the isoSPI circuit operates. A
2V reference drives the IBIAS pin. External resistors R
B1
and R
B2
create the reference current I
B
. This current sets
the drive strength of the transmitter. R
B1
and R
B2
also
form a voltage divider of the 2V reference at the ICMP
pin. This sets the threshold voltage of the receiver circuit.
Transmitted current pulses are converted into voltage by
termination resistor R
M
(in parallel with the characteristic
impedance of the cable).
External Connections
The LTC6804-1 has 2 serial ports which are called Port B
and Port A. Port B is always configured as a 2-wire interface
(master). The final device in the daisy chain does not use
this port, and it should be terminated into R
M
. Port A is
either a 2-wire or 4-wire interface (slave), depending on
the connection of the ISOMD pin.
680412 F15
SDI
SCK
D3 D2 D1 D0 D7…D4 D3
CURRENT COMMANDPREVIOUS COMMAND
t
7
t
8
t
6
t
5
SDO
CSB
D3D4 D2 D1 D0 D7…D4 D3
t
1
t
2
t
3
t
4
680412 F16
IMA OR IMB
R
M
IBIAS
V
ICMP
/3 + 167mV
I
B
R
B1
ICMP
2V
IPA OR IPB
LOGIC
AND
MEMORY
Tx = +1
Tx • 20 • I
B
Tx = –1
SDO
Tx = 0
PULSE
ENCODER/
DECODER
SDI
SCK
CSB
WAKEUP
CIRCUIT
(ON PORT A)
LTC6804
+
–
+
–
–
+
•
•
Rx = +1
Rx = –1
Rx = 0
35k
IDLE
V
REG
IDLE
35k
R
B2
COMPARATOR THRESHOLD = • V
ICMP
2
1
0.5x