Linear Technology LTC6804-1 - Page 38

LTC6804-1/LTC6804-2
38
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operaTion
Figure 17a is an example of a robust interconnection of
multiple identical PCBs, each containing one LTC6804-1.
Note the termination in the final device in the daisy chain.
The microprocessor is located on a separate PCB. To
achieve 2-wire isolation between the microprocessor PCB
and the 1st LTC6804-1 PCB, use the LTC6820 support IC.
The LTC6820 is functionally equivalent to the diagram in
Figure 16.
The LTC6804-2 has a single serial port (Port A) which can
be 2-wire or 4-wire, depending on the state of the ISOMD
pin. When configured for 2-wire communications, several
devices can be connected in a multi-drop configuration, as
shown in Figure 17b. The LTC6820 IC is used to interface
the MPU (master) to the LTC6804-2’s (slaves).
Using a Single LTC6804
When only one LTC6804 is needed, the LTC6804-2 is rec
-
ommended. It does not have isoSPI Port B, so it requires
fewer external components and consumes less power,
especially when Port A is configured as a
4-wire interface.
However, the LTC6804-1 can be used as a single (non
daisy-chained) device if the second isoSPI port (Port B) is
properly biased and terminated, as shown in Figure 18c.
ICMP should not be tied to GND, but can be tied directly
to IBIAS. A bias resistance (2k to 20k) is required for
IBIAS. Do not tie IBIAS directly to V
REG
or V
–
. Finally, IPB
and IMB should be terminated into a 100Ω resistor (not
tied to V
REG
or V
–
).
Selecting Bias Resistors
The adjustable signal amplitude allows the system to trade
power consumption for communication robustness, and
the adjustable comparator threshold allows the system to
account for signal losses.
The isoSPI transmitter drive current and comparator volt
-
age threshold are set by a resistor divider (R
BIAS
= R
B1
+ R
B2
) between the IBIAS and V
–
. The divided voltage is
connected to the ICMP pin which sets the comparator
threshold to 1/2 of this voltage (V
ICMP
). When either
isoSPI interface is enabled (not IDLE) IBIAS is held at 2V,
causing a current I
B
to flow out of the IBIAS pin. The IP
and IM pin drive currents are 20 • I
B
.
As an example, if divider resistor R
B1
is 2.8k and resistor
R
B2
is 1.21k (so that R
BIAS
= 4k), then:
I
B
=
2V
R
B1
+R
B2
= 0.5mA
I
DRV
=I
IP
=I
IM
= 20 •I
B
= 10mA
V
ICMP
= 2V •
R
B2
R
B1
+R
B2
=I
B
•R
B2
= 603mV
V
TCMP
= 0.5• V
ICMP
= 302mV
In this example, the pulse drive current I
DRV
will be 10mA,
and the receiver comparators will detect pulses with IP-IM
amplitudes greater than ±302mV.
If the isolation barrier uses 1:1 transformers connected
by a twisted pair and terminated with 120Ω resistors on
each end, then the transmitted differential signal amplitude
(±) will be:
V
A
=I
DRV
•
R
M
2
= 0.6V
(This result ignores transformer and cable losses, which
may reduce the amplitude).
isoSPI Pulse Detail
Two LTC6804 devices can communicate by transmitting
and receiving differential pulses back and forth through an
isolation barrier. The transmitter can output three voltage
levels: +V
A
, 0V, and –V
A
. A positive output results from
IP sourcing current and IM sinking current across load
resistor R
M
. A negative voltage is developed by IP sink-
ing and IM sourcing. When both outputs are off, the load
resistance forces the differential output to 0V.
T
o eliminate the DC signal component and enhance reli
-
ability, the isoSPI uses two different pulse lengths. This
allows for four types of pulses to be transmitted, as shown
in Table 21. A +1 pulse will be transmitted as a positive
pulse followed by a negative pulse. A –1 pulse will be
transmitted as a negative pulse followed by a positive
pulse. The duration of each pulse is defined as t
1/2PW
,
since each is half of the required symmetric pair. (The
total isoSPI pulse duration is 2 • t
1/2PW
).