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PIXELLENCE II
PixellenceII IC is a real-time image processing chip. It is mainly a co-processor sitting at the back
of the video ASSP (i.e. concept IC) in a typical TV chassis. PixellenceII gets the picture that will
otherwise be transmitted to the panel in RGB format and applies Vestel patented image and
video processing algorithms to further enhance the picture. After processing, the video is trans-
mitted to the 50/60 Hz panel serially through LVDS links and in RGB format.
PixellenceII IC supports Full HD (1920x1080) and WXGA (1366x768) resolutions with 10bit or
8-bit processing modes. PixellenceII is also congurable to other common resolutions such as
1920x1280, 1680x1050, 1440x900, 1280x1024, 1024x768, 1920x1200, 1600x900.
The PixellenceII IC incorporates following Vestel patented algorithms, functions and interfaces:
Algorithms:
Skin-tone detection and correction
Color Saturation
Dynamic Contrast Enhancement
Sharpness & CTI
De-ringing
De-blocking
Temporal Noise Reduction
Spatial Noise Reduction
Video Analysis Block
Main blocks of Pix2Frame are LVDS Rx, Tx and pix2_top modules. Major blocks of
pix2_top module are PixellenceII Core video enhancement engine, I2C Slave interface and
embedded Dynamic RAM (eDRAM, 64Mbit) macro.
TECHNISCHER KUNDENDIENST
Temporal Noise Reduction
Spatial Noise Reduction
Video Analysis Block
Main blocks of Pix2Frame are LVDS Rx, Tx and pix2_top modules. Major blocks of
pix2_top module are PixellenceII Core video enhancement engine, I2C Slave interface
and
embedded Dynamic RAM (eDRAM, 64Mbit) macro.
11 USB Interface
USB ports are directly connected concept IC, BCM 3556.
USB circuit has 2 main parts ESD Protection IC (U4 and U5) and Over Current
Protection IC (U108 and U109)
Loewe Opta GmbH
96317 Kronach, Industriestr. 11
Telefon (0 92 61) 99-0
Telefax (0 92 61) 99-730
e-mail: hotel-service@loewe.de
www.loewe.de
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