Marantz PMD620 - Clock Setting

38
Q202 : NJU3754
Package Outline
SSOP16
PIN CONFIGURATION
P0
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
CE
CLK
SO
P10
P9
P8
P7
P1
P2
P3
P4
P5
P6
V
SS
P0
Latch Circuit
Control Circuit
P1
P2
P9
P10
SO
CE
CLK
Shift Register
V
DD
V
SS
BLOCK DIAGRAM
No. SYMBOL I/O FUNCTION
1 P0 I
2 P1 I
3 P2 I
4 P3 I
5 P4 I
6 P5 I
7 P6 I
Parallel Data Input Terminals (with pull-up resistors)
8 V
SS
- Ground
9 P7 I
10 P8 I
11 P9 I
12 P10 I
Parallel Data Input Terminals (with pull-up resistors)
13 SO O Serial Data Output Terminal
14
CLK
I Serial Clock Input Terminal
15
CE
I Chip Enable Input Terminal
16 V
DD
- Power Supply Terminal (2.7 to 5.5V)
TERMINAL DESCRIPTION