Marantz SA-11S1 - Page 20

1-18
Pin
No
Signal Name Function Pin Usage Pin Name
74 IO_DOUT_BUSY NC IOB IO_DOUT_BUSY
75 CCLK Connect to ROM(XCF01S)2pin CCLK
76 VCCO
3.3v Power su
pp
l
y
p
ins for out
p
ut drivers
(
sub
j
ect to bankin
g
rules
)
VCCO
77 TDO JTAG terminal TDO
78 GND GND GND
79 TDI JTAG terminal TDI
80 IO_CS NC IOB IO_CS
81 IO_WRITE NC IOB IO_WRITE
82 192FS 192fsAÌoutput for DSP56364 and SM5866AS IOB IO_VREF_1
83 UNUSED NC IOB
84 UNUSED NC IOB
85 VCCINT
2.5v Power su
pp
l
y
p
ins for the internal core lo
g
ic.
VCCINT
86 8FS 8fsAÌoutput for DSP56364 and SM5866AS IOB IO_VREF_1
87 UNUSED NC IOB
88 DACL SACD or CD bit clock input GCLKIOB GCK2
89 GND GND GND
90 VCCO
3.3v Power su
pp
l
y
p
ins for out
p
ut drivers
(
sub
j
ect to bankin
g
rules
)
VCCO
91 D_CLK Input Frequency divider. GCLKIOB GCK3
92 VCCINT
2.5v Power su
pp
l
y
p
ins for the internal core lo
g
ic.
VCCINT
93 SYSO System clock for DAC IOB IO_VREF_0
94 VCCINT
2.5v Power su
pp
l
y
p
ins for the internal core lo
g
ic.
VCCINT
95 latout DSDO 8bit data Latch signal outPUT IOB
96 UNUSED NC IOB
97 timo<0> reset3 delayed 1(1time of fs) IOB IO_VREF_0
98 DACR reset3 delayed 20msec FOR DSP and DAC IOB
99 TCK JTAG terminal TCK
100 VCCO
3.3v Power su
pp
l
y
p
ins for out
p
ut drivers
(
sub
j
ect to bankin
g
rules
)
VCCO
MODE
DAPC
DSAR 2
LRCK
BCLK
DSDO
DSCK
DSCS3
latchi
RESET3
CLK in
Xin
osc_out
Xout
DA
QA
SACLO
SARO
SALO
DACLO
DALRO
DAPCO
SYSO
DO D7
latout
DSPR
768fs
384fs
192fs
512fs
8fs
TIM1
Control
data latch
DividerB
DividerA 3
DividerB 0
DividerA 4
Delay
20msec
DATA SWITCH
Latch
Divider Reset
OSC
1
100
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