Marantz SA17S1 - Page 24

34
126 WARFI Ai Analog RF signal input for PSP physical disc mark detection. The full scale is 0.0 to 2.5V. (typ.)
127 WAVRB Ai A/D bottom reference for PSP physical disc mark detection. The voltage input to this pin is set to bottom level of
the A/D converter.
128 WAVSS — A/D GND for PSP physical disc mark detection.
129 WAVSS — A/D GND for PSP physical disc mark detection.
130 VSIO — I/O GND.
131 DQ7 I/O SDRAM data I/O. (MSB)
132 DQ6 I/O SDRAM data I/O.
133 DQ5 I/O SDRAM data I/O.
134 DQ4 I/O SDRAM data I/O.
135 VDIO — I/O power supply. Supply +3.3V.
136 DQ3 I/O SDRAM data I/O.
137 DQ2 I/O SDRAM data I/O.
138 DQ1 I/O SDRAM data I/O.
139 DQ0 I/O SDRAM data I/O. (LSB)
140 VSIO — I/O GND.
141 DCLK O SDRAM clock output.
142 DCKE O SDRAM clock enable output.
143 XWE O SDRAM write enable output. Connect to the XWE pin of the SDRAM.
144 XCAS O SDRAM column address strobe output. Connect to the CAS pin of the SDRAM.
145 XRAS O SDRAM row address strobe output. Connect to the RAS pin of the SDRAM.
146 VDIO — I/O power supply. Supply +3.3V.
147 TESTO O Test output. Leave open.
148 A11 O SDRAM address output. (MSB)
149 A10 O SDRAM address output.
150 VSC — Core GND.
151 A9 O SDRAM address output.
152 A8 O SDRAM address output.
153 VDC — Core power supply. Supply +2.5V.
154 A7 O SDRAM address output.
155 A6 O SDRAM address output.
156 A5 O SDRAM address output.
157 A4 O SDRAM address output.
158 VSIO — I/O GND.
159 A3 O SDRAM address output.
160 A2 O SDRAM address output.
161 A1 O SDRAM address output.
162 A0 O SDRAM address output. (LSB)
163 VDIO — I/O power supply. Supply +3.3V.
164 XSRQ O Output for data request to front-end processor.
165 XSHD I Input for header fl ag output from front-end processor.
166 SDCK I Input for data transfer clock output from front-end processor.
167 XSAK I Input for data valid fl ag output from front-end processor.
168 SDEF I Input for error fl ag output from front-end processor.
169 SD0 I Input for stream data from front-end processor. (LSB)
170 SD1 I Input for stream data from front-end processor.
171 SD2 I Input for stream data from front-end processor.
172 SD3 I Input for stream data from front-end processor.
173 SD4 I Input for stream data from front-end processor.
174 SD5 I Input for stream data from front-end processor.
175 SD6 I Input for stream data from front-end processor.
176 SD7 I Input for stream data from front-end processor. (MSB)
Ipu: pulled-up input, Ipd: pulled-down input, Ai: analog input
Q123 : CXD2752R