Marvell 88E1111 - Page 28

Doc. No. MV-S105540-00, Rev. A
Page 28 Document Classification: Proprietary Information
Table 11: JTAG Interface
117-TFBGA
Pin #
96-aQFN
Pin #
128-PQFP
Pin #
Pin Type Pin
Name
Description
L7 B21 67 TDI I, PU Boundary scan test data input.
TDI contains an internal 150 kohm pull-up
resistor.
L8 B22 69 TMS I, PU Boundary scan test mode select input.
TMS contains an internal 150 kohm pull-up
resistor.
L9 A26 70 TCK I, PU Boundary scan test clock input.
TCK contains an internal 150 kohm pull-up
resistor.
M9 A25 68 TRSTn I, PU Boundary scan test reset input. Active low.
TRSTn contains an internal 150 kohm pull-
up resistor as per the 1149.1 specification.
After power up, the JTAG state machine
should be reset by applying a low signal on
this pin, or by keeping TMS high and apply-
ing 5 TCK pulses, or by pulling this pin low
by a 4.7 kohm resistor.
K8 A27 72 TDO O, Z Boundary scan test data output.
88E1111 Product Brief
Integrated 10/100/1000 Ultra Gigabit Ethernet Transceiver
Copyright © 2020 Marvell
December 2, 2020