Maxim Integrated Page 17 of 52
I
2
C Write
The process for an I
2
C write data transfer is as follows:
1. The bus master indicates a data transfer to the device with a START condition.
2. The master transmits one byte with the 7-bit slave address (most significant 7 bits of the 8-bit
address) and a single write bit set to zero. The eight bits to be transferred as a slave address for
the MAX32664 is 0xAA for a write transaction.
3. During the next SCL clock following the write bit, the master releases SDA. During this clock period,
the device responds with an ACK by pulling SDA low.
4. The master senses the ACK condition and begins to transfer the Family Byte. The master drives
data on the SDA circuit for each of the eight bits of the Family byte, and then floats SDA during
the ninth bit to allow the device to reply with the ACK indication.
5. The master senses the ACK condition and begins to transfer the Index Byte. The master drives
data on the SDA circuit for each of the eight bits of the Index byte, and then floats SDA during the
ninth bit to allow the device to reply with the ACK indication.
6. The master senses the ACK condition and begins to transfer the Write Data Byte 0. The master
drives data on the SDA circuit for each of the eight bits of the Write Data Byte 0, and then floats
SDA during the ninth bit to allow the device to reply with the ACK indication.
7. The master senses the ACK condition and can begin to transfer another Write Data Byte if
required. The master drives data on the SDA circuit for each of the eight bits of the Write Data
Byte, and then floats SDA during the ninth bit to allow the device to reply with the ACK indication.
If another Write Data Byte is not required, the master indicates the transfer is complete by
generating a STOP condition. A STOP condition is generated when the master pulls SDA from a
low to high while SCL is high.
8. The master waits for a period of CMD_DELAY (2 m60µsec) for the device to have its data ready.
9. The master indicates a data transfer to a slave with a START condition.
10. The master transmits one byte with the7-bit slave address and a single write bit set to one. This
is an indication from the master of its intent to read the device from the previously written
location defined by the Family Byte and the Index Byte. The master then floats SDA and allows
the device to drive SDA to send the Status Byte. The Status Byte reveals the success of the previous
write sequence. After the Status Byte is read, the master drives SDA low to signal the end of data
to the device.
11. The master indicates the transfer is complete by generating a STOP condition.
12. After the completion of the write data transfer, the Status Byte must be analyzed to determine if
the write sequence was successful and the device has received the intended command.
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