7I90HD 34
REFERENCE INFORMATION
LBP16
SPACE 4 LBP TIMER/UTILITY AREA
Address space 4 is for read/write access to LBP specific timing registers. All memory
space 4 access is 16 bit.
Space 4 read with address NN51LLHH
Space 4 write with address NND1LLHHDDDD
Space 4 read NN11
Space 4 write NN91DDDD
MEMORY SPACE 4 LAYOUT:
ADDRESS DATA
0000 uSTimeStampReg
0002 WaituSReg
0004 HM2Timeout
0006 WaitForHM2RefTime
0008 WaitForHM2Timer1
000A WaitForHM2Timer2
000C WaitForHM2Timer3
000E WaitForHM2Timer4
The uSTimeStamp register reads the free running hardware microsecond timer. It
is useful for timing internal 7I90 operations. Writes to the uSTimeStamp register are a no-
op. The WaituS register delays processing for the specified number of microseconds when
written, (0 to 65535 uS) reads return the last wait time written. The HM2TimeOut register
sets the timeout value for all WaitForHM2 times (0 to 65536 uS).
All the WaitForHM2Timer registers wait for the rising edge of the specified timer or
reference output when read or written, write data is don’t care, and reads return the wait
time in uS. The HM2TimeOut register places an upper bound on how long the WaitForHM2
operations will wait. HM2Timeouts set the HM2TImeout error bit in the error register.
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