Mitsubishi Electric melsec q03ud(E)cpu - Page 528

12 - 62
CHAPTER12 PECIAL RELAY LIST AND SPECIAL REGISTER LIST
1
2
3
12
6
7
8
12.2 SPECIAL REGISTER LIST
(7) Debug
*1: The module whose first 5 digits of serial No. is "10042" or later.
(8) Redundant CPU information (host system CPU information
*1
)
*1: The host system CPU information is stored.
(9) Remote password count
*1: This applies to the Built-in Ethernet port QCPU.
Table12.25 Special register
Number Name Meaning Explanation
Set by
(When Set)
Corres-
ponding
ACPU
D9
Corresponding
CPU
SD840
Debug function
usage
Debug function
usage
Stores the status of the debug function usage as shown below.
0: Forced ON/OFF for external I/O
1: Executional conditioned device test
2 to 15:Absent (0 fix)
(0: Not used, 1: Used)
S (Status
change)
New
QnU
*1
Table12.26 Special register
Number Name Meaning Explanation
Set by
(When Set)
Corres-
ponding
ACPU
D9
Corresponding
CPU
SD952
History of
memory copy
from control
system to
standby system
Latest status of
memory copy
from control
system to standby
system
Stores the completion status of the memory copy from control system to
standby system executed last.
1) Stores the same value as stored into SD1596 at normal completion/
abnormal completion of the memory copy from control system to
standby system.
2) Backed up for a power failure, this special register holds the status of
memory copy from control system to standby system executed last.
3) Cleared to 0 by latch clear operation.
S (Status
change)
New QnPRH
Table12.27 Special register
Number Name Meaning Explanation
Set by
(When Set)
Corres-
ponding
ACPU
D9
Corresponding
CPU
SD979
Direct
MELSOFT
connection
Count of unlock
processing
failures
Stores the count of unlock processing failures.
Range: 0 to FFFEH (FFFFH when the limit is exceeded)
S(Status
change)
New
QnU
*1
SD980 to
SD995
Connection
1 to 16
SD998
MELSOFT
connection
using TCP port
SD999
FTP
communi
cation port
0
b15 b2to b1 b0
Executional conditioned
device test
Forced ON/OFF for
external I/O