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General| Series | MELSEC-Q |
|---|---|
| Model | Q00U(J)CPU |
| Power supply voltage | 24 VDC |
| Operating temperature | 0 to 55 °C |
| Number of I/O Points | 4096 points |
| Programming Language | Ladder, Instruction list, SFC, Function block, Structured text |
| Execution Speed (LD instruction) | 0.08 µs |
| Dimensions | 90 x 90 x 90 mm |
| Weight | 0.5 kg |
| Processing speed | 0.08 µs |
| Built-in ports | RS-232 |
| Communication | Ethernet, Serial |
| Type | Programmable Logic Controller (PLC) |
Configure external safety circuits and understand output status upon fault detection for system safety and reliability.
Details specifications, functions, maintenance, troubleshooting, and error codes of CPU modules.
Describes instructions, programming, and error codes for various programming languages like SFC.
Covers fundamental programming steps: project creation, program creation, conversion, writing, checking, and saving.
Details programming concepts like memory, files, base units, I/O assignment, and scan time structure.
Describes various functions of the Universal model QCPU, including lists, operations, and settings.
Lists all internal user devices, internal system devices, link direct devices, and other devices with their points and ranges.
Details internal user devices like input (X), output (Y), internal relay (M), latch relay (L), annunciator (F), edge relay (V), timers, counters, registers.
Describes fixed internal system devices like function devices (FX, FY, FD), special relays (SM), and special registers (SD).
Explains direct access to link devices in CC-Link IE, MELSECNET/H modules, and their specification methods.
Details intelligent function module device and cyclic transmission area device for accessing buffer memory and shared memory.
Explains index registers for indirect specification and standard device registers for higher speed operations.
Describes file register usage, storage location, size, differences from link refresh, and registration procedures.
Explains extended data and link registers as extensions to data and link registers, using file register area.
Details nesting (N) device used with master control instructions for programming operation conditions.
Explains pointers used for jump and subroutine call instructions, including local and common pointer types.
Describes interrupt pointers for starting interrupt programs and lists available interrupt factors and their priorities.
Covers SFC block devices (BL), Network No. specification devices (J), I/O No. specification devices (U), and Macro instruction argument devices (VD).
Specifies decimal data in sequence programs using the 'K' notation.
Specifies hexadecimal or BCD data in sequence programs using the 'H' notation.
Specifies real numbers in sequence programs using the 'E' notation for floating-point data.
Specifies character strings in sequence programs using characters enclosed in quotation marks.
Describes global devices that can be shared by multiple programs, stored in CPU module device memory.
Explains local devices used independently for each program, allowing multiple programs without conflicts.
Details parameters for programmable controller systems, including PLC, Network, and Remote Password settings.
Lists functions added or changed based on CPU module and programming tool versions.
Describes scan time structures and CPU module processing times for various operations.
Explains numeric representations like BIN, HEX, BCD, and real numbers used in sequence programs.
Provides precautions and methods for replacing basic or high performance QCPU with Universal model QCPU.
Details precautions and replacement methods when migrating from QnUD(E)(H)CPU to QnUDVCPU/QnUDPVCPU.
Provides precautions for replacing QnPHCPU with QnUDPVCPU.
Covers precautions and differences when using GX Works2 versus GX Developer.
Explains how to use various types of backup/restoration functions for GOT and CPU modules.
