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Mitsubishi Electric Q13UDVCPU - Appendix 3 List of Special Register Areas

Mitsubishi Electric Q13UDVCPU
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Appendix 3 List of Special Register Areas
The special register (SD) is an internal register whose application is fixed in the programmable controller. For this
reason, the special register cannot be used in the same way as other internal registers are used in sequence
programs. However, data can be written to the special register to control the CPU module as needed. Data is stored in
binary format if not specified.
The following table shows how to read the special register list.
For details on the following items, refer to the following.
For network related items: Manuals for each network module
For SFC programs: MELSEC-Q/L/QnA Programming Manual (SFC)
Do not change the values of special register set by system using a program or by test operation. Doing so may result in
system down or communication failure.
Item Description
Number Special register number
Name Special register name
Meaning Contents of special register
Explanation Detailed description of special register
Set by (When Set)
Set side and set timing of special register
<Set by>
S: Set by system
U: Set by user (using a program, programming tool, GOT, or test operation from other external devices)
S/U: Set by both system and user
<When Set>
The following shows the set timing when the special register is set by system.
Every END processing: Set during every END processing
Initial: Set during initial processing (after power-on or status change from STOP to RUN)
Status change: Set when the operating status is changed
Error: Set if an error occurs
Instruction execution: Set when an instruction is executed
Request: Set when requested by a user (using the special relay)
When condition occurs: Set when the condition is triggered
When system is switched: Set when the system is switched (between the control system and the standby system)
When RUN/STOP/RESET switch changed: Set when the RUN/STOP/RESET switch is changed
Card removal: Set when a memory card is inserted or removed
At write: Set when data are written to the CPU module by a user
During END processing: Set during END processing
Corresponding CPU
CPU module supporting the special register
QCPU: All the Q series CPU modules
Q00J/Q00/Q01: Basic model QCPU
Qn(H): High Performance model QCPU
QnPH: Process CPU
QnPRH: Redundant CPU
QnU: Universal model QCPU
QnUDV: High-speed Universal model QCPU
Q00UJ/Q00U/Q01U: Q00UJCPU, Q00UCPU, and Q01UCPU
LCPU: All the L series CPU modules
CPU module model: Only the specified model (Example: Q02UCPU, L26CPU-BT)
Corresponding
ACPU
D9
Special register (D9) supported by the ACPU ("D9 format change" indicates the one whose application has been
changed. Incompatible with the Q00J/Q00/Q01 and QnPRH.)
"New" indicates the one added for the QCPU or LCPU.

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