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4 SFC PROGRAM CONFIGURATION
MELSEC-Q
(3) The execution of the corresponding block is restarted from the step where it had stopped when
the "block STOP/RESTART bit" is turned OFF in the sequence program, SFC program or
peripheral device.
An “operation HOLD status” step (with transition check or without transition check) which has
been stopped will be restarted with the operation HOLD status in effect.
A coil output HOLD step cannot be restarted after being stopped as it is deactivated at that
time.
(4) When a block STOP is canceled, the PLS or
P instruction is executed.
When the special relay for operation output selection at block STOP (SM325) is turned ON,
the PLS or
P instruction is not executed if a block STOP is canceled.
(5) When the SFC control “block STOP” instruction (PAUSE BLm) is executed, the block in
question is stopped, and the block STOP/RESTART bit switches ON.
When the “block RESTART” instruction (RSTART BLm) is executed while the block is stopped,
the block in question is restarted, and the block STOP/RESTART bit switches OFF.
POINTS
(1) Stopping of program processing by a block STOP/RESTART bit being switched ON, or by
a block STOP instruction, applies only to the specified block.
(2) Even if a block stop is executed for the START destination block, the START source block
will not be stopped.
(3) Even if a block stop is executed for the START source block, the START destination block
will not be stopped.
Related Instructions
1) SFC information device
• Block STOP mode bit.....................................................See Section 4.5.4.
2) SFC control instructions
• Block STOP instruction (PAUSE BLm) and block RESTART instruction
(RSTART BLm) .............................................................See Section 4.4.7.
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