NAiS FPG-C32T2 - Page 302

FPΣ
13.8 Table of Instructions
13 - 53
No. Name Boolean Operand Description Steps
BCD arithmetic instructions
F40 4-digit BCD
data addition
B+ S, D (D) + (S) → (D) 5
F41 8-digit BCD
data addition
DB+ S, D (D+1, D) + (S+1, S) → (D+1, D) 7
F42 4-digit BCD
data addition
(Destination
setting)
B+ S1, S2, D (S1) + (S2) → (D) 7
F43 8-digit BCD
data addition
(Destination
setting)
DB+ S1, S2, D (S1+1, S1) + (S2+1, S2) → (D+1, D) 11
F45 4-digit BCD data
subtraction
B- S, D (D) - (S) → (D) 5
F46 8-digit BCD data
subtraction
DB- S, D (D+1, D) - (S+1, S) → (D+1, D) 7
F47 4-digit BCD data
subtraction
(Destination
setting)
B- S1, S2, D (S1) - (S2) → (D) 7
F48 8-digit BCD data
subtraction
(Destination
setting)
DB- S1, S2, D (S1+1, S1) - (S2+1, S2) → (D+1, D) 11
F50 4-digit BCD data
multiplication
B* S1, S2, D (S1) × (S2) → (D+1, D) 7
F51 8-digit BCD data
multiplication
DB* S1, S2, D (S1+1, S1) × (S2+1, S2) → (D+3, D+2, D+1, D) 11
F52 4-digit BCD
data division
B% S1, S2, D (S1) ÷ (S2) → quotient (D) remainder (DT90015) 7
F53 8-digit BCD
data division
DB% S1, S2, D (S1+1, S1) ÷ (S2+1, S2) → quotient (D+1, D)
remainder (DT90016, DT90015)
11
F55 4-digit BCD
data increment
B+1 D (D) + 1 → (D) 3
F56 8-digit BCD
data increment
DB+1 D (D+1, D) + 1 → (D+1, D) 3
F57 4-digit BCD
datadecrement
B-1 D (D) - 1 → (D) 3
F58 8-digit BCD
datadecrement
DB-1 D (D+1, D) - 1 → (D+1, D) 3
Data comparison instructions
F60 16-bit data
comparison
CMP S1, S2 (S1) > (S2) → R900A: on
(S1) = (S2) → R900B: on
(S1) < (S2) → R900C: on
5
F61 32-bit data
comparison
DCMP S1, S2 (S1+1, S1) > (S2+1, S2) → R900A: on
(S1+1, S1) = (S2+1, S2) → R900B: on
(S1+1, S1) < (S2+1, S2) → R900C: on
9
F62 16-bitdataband
comparison
WIN S1, S2, S3 (S1) > (S3) → R900A: on
(S2) (S1) (S3) → R900B: on
(S1) < (S2) → R900C: on
7