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General| Brand | National Instruments |
|---|---|
| Model | 622 Series |
| Category | I/O Systems |
| Language | English |
General safety precautions for operating M Series devices and modules.
Steps for installing software and hardware for M Series devices.
Procedure for self-calibrating M Series devices after installation and temperature changes.
Information on connecting the disk drive power connector for M Series PCI Express devices.
Information on features and best practices for M Series USB devices.
Overview of DAQ hardware functions like signal digitization and I/O control for M Series devices.
Description of cables and accessories available for M Series devices and their connector types.
Explanation of signal conditioning for sensors and transducers used with M Series devices.
Information on using NI-DAQmx driver software to program M Series measurement devices.
Details of signals found on the I/O connectors of M Series devices.
Information on the +5 V terminals for powering external circuitry and their ratings.
Explanation of the behavior of ACTIVE and READY LEDs on M Series USB devices.
Explanation of input ranges and their effect on M Series device resolution and accuracy.
Description of Differential, RSE, and NRSE modes for M Series analog input ground-reference settings.
Issues to consider for accurate multichannel scanning in M Series devices, focusing on settling time.
Overview of software-timed and hardware-timed acquisition methods for analog input.
Explanation of analog input triggering actions: Start, Reference, and Pause triggers.
Recommended input configurations for floating and ground-referenced signal sources.
Recommendations for minimizing noise pickup and maximizing measurement accuracy in analog signal routing.
Summary of timing options provided by the analog input timing engine.
How to set AO range by configuring offset and reference selection for M Series devices.
Explanation of output signal glitches and methods to minimize them using deglitching filters.
Overview of software-timed and hardware-timed generation methods for analog output.
Details on hardware-timed generation, including buffered operations and sample modes.
Explanation of analog output triggering actions: Start and Pause triggers.
Summary of AO waveform generation timing signals.
Using DIO lines for static digital input or output, individually configurable.
Methods for triggering digital waveform acquisition or generation using sample clocks.
Acquiring digital waveforms on Port 0 DIO lines, storing samples in FIFO.
Generating digital waveforms on Port 0 DIO lines using DO Sample Clock.
Protection against overvoltage, undervoltage, overcurrent, and ESD events for DIO and PFI signals.
Setting programmable power-up states for PFI and DIO lines.
Configuring DAQ device to detect changes in DIO signals and trigger events.
How to individually program DIO lines as input or output, including TTL signals.
Lists various counter input applications like Counting Edges, Pulse-Width Measurement, etc.
Counting edges on Source input after counter is armed, with options for single point or buffered.
Measuring pulse width on Gate input signal using Source input for counting edges.
Measuring the period on Gate input signal by counting Source edges between two active edges.
Measuring a semi-period on Gate input signal by counting Source edges between two consecutive edges.
Methods for measuring frequency using counters, including low and high frequency techniques.
Performing position measurements using quadrature encoders or two-pulse encoders.
Lists counter output applications like Simple Pulse Generation, Pulse Train Generation, etc.
Details on counter timing signals such as Source, Gate, Aux, and HW Arm.
Default NI-DAQmx counter/timer pin assignments for various M Series devices.
Explanation of counter triggering actions: Arm Start Trigger, Start Trigger, and Pause Trigger.
Additional counter features like Cascading Counters, Counter Filters, Prescaling, and Duplicate Count Prevention.
Describes synchronization modes like 80 MHz Source Mode, Other Internal Source Mode, and External Source Mode.
Routing external timing signals to M Series functions using PFI terminals.
Routing timing signals to PFI terminals configured as outputs.
Configuring PFI terminals as static digital inputs or outputs.
How to connect external PFI sources to M Series devices, referencing D GND.
Enabling programmable debouncing filters on PFI, RTSI, or PXI_STAR signals for counter inputs.
Protection against overvoltage, undervoltage, overcurrent, and ESD events for DIO and PFI signals.
Setting programmable power-up states for PFI and DIO lines.
Overview of clock routing circuitry and its main functions in M Series devices.
Use of 80 MHz Timebase as Source input for counter/timers and its generation sources.
Role of 20 MHz Timebase in generating AI and AO timing signals and as Source input.
Use of 100 kHz Timebase for AI and AO timing signals and as Source input.
Using external reference clock to synchronize internal timebases on M Series devices.
Synchronizing other devices to M Series devices using the 10 MHz reference clock.
Methods for synchronizing multiple M Series devices using PXI/PXI Express, PCI/PCI Express, and USB devices.
Set of bused signals for driving timing engines and sharing triggers among devices.
Pinout diagram and signal descriptions for the RTSI connector on PCI/PCI Express devices.
Driving various signals to RTSI terminals when configured as outputs.
Routing external timing signals to M Series functions using RTSI terminals.
Enabling programmable debouncing filters on PFI, RTSI, or PXI_STAR signals for counter inputs.
Information on PXI clock and trigger signals available on PXI/PXI Express devices.
Overview of bus interface data transfer methods for M Series devices.
Primary ways to transfer data across the PCI bus using DMA, Interrupt Request, and Programmed I/O.
Methods for transferring data across the USB bus using USB Signal Stream and Programmed I/O.
Specific considerations for PXI devices, including clock and trigger signals and compatibility.
Information on installing NI PXI M Series devices in PXI and PXI Express chassis.
Using PXI-compatible products with standard CompactPCI products and operational considerations.
Generating triggers on digital signals by specifying source and edge.
Generating triggers on analog signals using APFI terminals or analog input channels.
Using APFI terminals as analog triggers, noting impedance and crosstalk considerations.
Using analog input channels to drive the NI-PGIA for analog trigger detection.
Actions that can be programmed in response to the Analog Comparison Event signal.
Routing the Analog Comparison Event signal to PFI or RTSI terminals.
Different analog trigger modes: Edge Triggering, Hysteresis, and Window Triggering.
Methods to improve analog trigger accuracy, including AI channel usage and software calibration.
Pinout diagram for the PCI/PXI-6220 device.
Pinout diagram for the PCI/PXI-6221 (68-Pin) device.
Pinout diagram for the PCI-6221 (37-Pin) device.
Pinout diagram for the PCI/PXI-6224 device.
Pinout diagram for the PCI/PXI-6225 device.
Pinout diagram for the NI PCI/PCIe/PXI/PXIe-6259 device.
Pinout diagram for the PCI/PXI-6250 device.
Pinout diagram for the NI PCI/PCIe/PXI/PXIe-6251 device.
Pinout diagram for the PCI/PXI-6254 device.
Pinout diagram for the PCI/PXI-6255 device.
Pinout diagram for the NI PCI/PCIe/PXI/PXIe-6259 device.
Pinout diagram for the PCI/PXI-6280 device.
Pinout diagram for the PCI/PXI-6281 device.
Pinout diagram for the PCI/PXI-6284 device.
Pinout diagram for the PCI/PXI-6289 device.
Detailed timing information and diagrams for analog input triggers and clock signals.
Delays involved in importing external signals for triggers or clocks in the AI timing engine.
Timing levels controlling analog-to-digital conversions and sample timing.
Signal determining when analog-to-digital conversion is started, affecting ADC and I/O terminals.
Signal indicating the start of a sample, generated from external or internal sources.
Signal used to pause acquisition by internal or external sources.
Delays involved in exporting internal signals to external terminals for triggering or timing.
Timing diagrams for analog output operations, covering input, internal, and output timing.
Timing delays and requirements for digital waveform acquisitions and generations.
Input delays, requirements, output delays, gating modes, and encoder timing for counters.
Addresses common analog input issues like crosstalk, ghost voltages, and random drift.
Explains using AI Sample Clock and AI Convert Clock for interval sampling.
Discusses minimizing glitches on the analog output signal.
Addresses issues with buffered counter measurements and signal connections.
Troubleshooting device detection issues with MAX or the operating system.
Compares pinouts of 68-pin M Series and E Series devices, noting enhanced functionality.
Information on finding and using NI-DAQmx example programs for M Series devices.
References to documentation for M Series devices, including DAQ Getting Started Guides and Specifications.
Guides for installation, configuration, and specifications for M Series devices.
Information on NI-DAQmx support for devices, ADEs, and applications on Windows.
Guides for installing and configuring NI-DAQmx for Linux, noting device support.
Guides for installing and configuring NI-DAQmx Base for Linux and Mac OS X.
Resources for learning LabVIEW programming concepts and NI-DAQmx integration.
Information on creating measurement tasks using DAQ Assistant in LabWindows/CVI.
Using Measurement Studio with Visual C# or Visual Basic .NET for NI-DAQmx applications.
Overview of NI services including Maintenance, Calibration, and System Integration support.
NI's offerings for system accuracy, reliability, warranty, sparing, and calibration services.
Assistance from NI Alliance Partners for projects with time constraints or technical resource limitations.
Information on NI training and certification programs to enhance application development proficiency.
Resources for technical support, including KnowledgeBase, forums, and software support memberships.
Claim of compliance with European Communities regulations for electromagnetic compatibility and product safety.
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