National Instruments NI cDAQ-9178

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NI cDAQ

-9171/9174/9178

User Manual

NI CompactDAQ USB 2.0 Chassis

NI cDAQ-9171/9174/9178 User Manual

July 2016

372838E-01

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Main Page

Table of Contents6
Getting Started with the Cdaq Chassis11
Electromagnetic Compatibility Guidelines13
Safety Guidelines13
Safety Guidelines for Hazardous Voltages13
Hardware Symbol Definitions14
Unpacking14
Installing the Cdaq Chassis15
Mounting the Cdaq Chassis17
NI 9901 Desktop Kit for Cdaq-9174/9178 Chassis18
Using the Cdaq Chassis on a Desktop18
Cdaq-9174/917819
Mounting the Cdaq Chassis on a Panel19
Mounting the Cdaq-9174/9178 on a DIN Rail21
Cdaq Chassis Features22
Leds22
Chassis Grounding Screw23
Power Connector23
TRIG 0 (PFI 0) and TRIG 1 (PFI 1) BNC Connectors23
USB Port and Cable Strain Relief23
Cables and Accessories24
Removing Modules from the Chassis24
C Series Module25
Using the Cdaq Chassis25
Cdaq Module Interface26
Parallel Versus Serial DIO Modules26
Stc326
Analog Input28
Analog Input Timing Signals28
Analog Input Triggering Signals28
AI Convert Clock Signal Behavior for Analog Input Modules29
AI Sample Clock Signal29
AI Sample Clock Timebase Signal29
Routing the Sample Clock to an Output Terminal29
Scanned Modules30
Sigma-Delta Modules30
Simultaneous Sample-And-Hold Modules30
Slow Sample Rate Modules31
AI Reference Trigger Signal32
AI Start Trigger Signal32
Routing AI Start Trigger to an Output Terminal32
Using a Digital Source32
Using an Analog Source32
Using a Digital Source33
Using an Analog Source33
AI Pause Trigger Signal34
Getting Started with AI Applications in Software34
Routing the Reference Trigger Signal to an Output Terminal34
Using a Digital Source34
Using an Analog Source34
Analog Output35
Analog Output Data Generation Methods35
Software-Timed Generations35
Buffered Analog Output36
Hardware-Timed Generations36
Analog Output Timing Signals37
Analog Output Triggering Signals37
AO Sample Clock Signal37
Routing AO Sample Clock to an Output Terminal37
AO Sample Clock Timebase Signal38
AO Start Trigger Signal38
Routing AO Start Trigger Signal to an Output Terminal38
Using a Digital Source38
Using an Analog Source38
AO Pause Trigger Signal39
Using a Digital Source39
Using an Analog Source39
Getting Started with AO Applications in Software40
Minimizing Glitches on the Output Signal40
Digital Input/Output41
Digital Input/Output and PFI41
Serial DIO Versus Parallel DIO Modules41
Digital Input42
Digital Input Timing Signals42
Digital Input Triggering Signals42
Static DIO42
Digital Input Filters46
Change Detection Acquisition47
Change Detection Event47
Getting Started with DI Applications in Software47
Routing Change Detection Event to an Output Terminal47
Digital Output48
Digital Output Data Generation Methods48
Digital Output Timing Signals50
Digital Output Triggering Signals50
Digital Input/Output Configuration for ni 940153
Getting Started with DO Applications in Software53
Pfi53
PFI Filters53
Counter Timing Engine55
Counters55
Counter Input Applications57
Counting Edges57
Single Point (On-Demand) Edge Counting57
Buffered (Sample Clock) Edge Counting58
Controlling the Direction of Counting58
Pulse-Width Measurement59
Single Pulse-Width Measurement59
Implicit Buffered Pulse-Width Measurement60
Sample Clocked Buffered Pulse-Width Measurement60
Implicit Buffered Pulse Measurement61
Pulse Measurement61
Single Pulse Measurement61
Sample Clocked Buffered Pulse Measurement62
Semi-Period Measurement62
Implicit Buffered Semi-Period Measurement63
Single Semi-Period Measurement63
Frequency Measurement64
Low Frequency with One Counter64
Pulse Versus Semi-Period Measurements64
High Frequency with Two Counters65
Large Range of Frequencies with Two Counters66
Sample Clocked Buffered Frequency Measurement67
Choosing a Method for Measuring Frequency68
Which Method Is Best69
Measurements Using Quadrature Encoders72
Period Measurement72
Position Measurement72
Channel Z Behavior73
Buffered (Sample Clock) Position Measurement74
Measurements Using Two Pulse Encoders74
Single Two-Signal Edge-Separation Measurement75
Two-Signal Edge-Separation Measurement75
Implicit Buffered Two-Signal Edge-Separation Measurement76
Sample Clocked Buffered Two-Signal Separation Measurement76
Counter Output Applications77
Simple Pulse Generation77
Single Pulse Generation77
Pulse Train Generation78
Single Pulse Generation with Start Trigger78
Finite Pulse Train Generation79
Retriggerable Pulse or Pulse Train Generation79
Continuous Pulse Train Generation80
Buffered Pulse Train Generation81
Finite Implicit Buffered Pulse Train Generation81
Continuous Buffered Implicit Pulse Train Generation82
Finite Buffered Sample Clocked Pulse Train Generation82
Continuous Buffered Sample Clocked Pulse Train Generation83
Frequency Generation84
Using the Frequency Generator84
Frequency Division85
Pulse Generation for ETS85
Counter N Source Signal86
Counter Timing Signals86
Counter N Gate Signal87
Routing a Signal to Counter N Gate87
Routing a Signal to Counter N Source87
Routing Counter N Source to an Output Terminal87
Counter N A, Counter N B, and Counter N Z Signals88
Counter N aux Signal88
Routing a Signal to Counter N aux88
Routing Counter N Gate to an Output Terminal88
Routing Counter N Z Signal to an Output Terminal88
Routing Signals to A, B, and Z Counter Inputs88
Counter N HW Arm Signal89
Counter N Sample Clock Signal89
Counter N Up_Down Signal89
Routing Signals to Counter N HW Arm Input89
Counter N Internal Output and Counter N TC Signals90
Frequency Output Signal90
Routing Counter N Internal Output to an Output Terminal90
Routing Counter N Sample Clock to an Output Terminal90
Using an External Source90
Using an Internal Source90
Counter Triggering91
Default Counter/Timer Routing91
Routing Frequency Output to a Terminal91
Cascading Counters92
Other Counter Features92
Prescaling92
Synchronization Modes92
80 Mhz Source Mode93
External or Internal Source Less than 20 Mhz93
80 Mhz Timebase94
Clock Routing94
Digital Routing94
Digital Routing and Clock Generation94
100 Khz Timebase95
20 Mhz Timebase95
Appendix A Where to Go from here96

National Instruments NI cDAQ-9178

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