0
0
Low level is output during the latter half (Note
1)
of the counting
period.
0
1
Low level is output during the latter half of the counting period: and
a count length automatically
programrncd is entered whcn the final
value
TC
is reached.
Then the operation is
repeatcd.
1
0
A
pulse is output when the final value TC is reached.
1
1
A
pulse is output each time the final value TC is reached;
automatically inputting a count length which has been given in the
program.
Illen the operation is repeated.
Note
1:
In the case of an asymmetric count, such as
9,
the output is high for
5
counts. and low for four.
Note
2:
When the hlShI81CSjRS is reset. it stops counting.
The counter is not
set to any specific initial value or output mode. TO resume counting after a reset,
use the
START
instruction in the
CIS
register.
(6)
Standby mode
Standby
mode is provided
at
the trailing edge of
ALE
after is disasserted.
This
is because
CE
from thc
h,lSM81C55RS
is latched at the leading edge of
ALE.
Simultaneously thc levels of the input port and timer input should be set at
a
potential of Vcc or
GND.
A
battery should be used only after setting the level
of output ports low or using all ports as
input ports, and also setting the timer
output to low or adding
a
buffer whose power-supply terminal is connected to the
battery.
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