NXP Semiconductors LPC546 Series

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UM10912

LPC546xx User manual

Rev. 1.7 — 14 April 2017 User manual

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Keywords LPC546xx, ARM Cortex-M4, 32-bit microcontroller, LCD, Ethernet AVB,

SPIFI, SCT/PWM, USB Host, USB device, CAN FD, I2C, I2S, EEPROM,

Flash, EMC, SDRAM controller, DMIC, SDIO interface, SD card interface,

LCD controller, eCRP

Abstract LPC546xx User Manual

Main Page

Chapter 1: LPC546xx Introductory information5
- 1.1 Introduction5
- 1.2 Features5
- 1.3 Block diagram9
- 1.4 Architectural overview10
- 1.5 ARM Cortex-M4 processor10
- 1.6 On-chip flash memory system10
- 1.7 On-chip Static RAM10
- 1.8 On-chip EEPROM11
- 1.9 Ordering information12
  - 1.9.1 Ordering options12
Chapter 2: LPC546xx Memory map14
- 2.1 General description14
Chapter 3: LPC546xx Nested Vectored Interrupt Controller (NVIC)20
- 3.1 How to read this chapter20
- 3.2 Features20
- 3.3 General description20
  - 3.3.1 Interrupt sources20
- 3.4 Register description23
Chapter 4: LPC546xx System configuration (SYSCON)35
- 4.1 Features35
- 4.2 Basic configuration35
- 4.3 Pin description36
- 4.4 General description37
  - 4.4.1 Clock generation37
- 4.5 Register description41
- 4.6 Functional description110
Chapter 5: LPC546xx Power management122
- 5.1 Introduction122
- 5.2 General description122
  - 5.2.1 Wake-up process123
- 5.3 Functional description125
Chapter 6: LPC546xx Boot process130
- 6.1 Features130
- 6.2 Pin description130
- 6.3 General description131
  - 6.3.1 Boot process flowchart132
  - 6.3.2 Boot flow134
Chapter 7: LPC546xx I/O pin configuration (IOCON)140
- 7.1 How to read this chapter140
- 7.2 Features140
- 7.3 Basic configuration140
- 7.4 General description141
  - 7.4.1 Pin configuration141
  - 7.4.2 IOCON registers141
- 7.5 Register description144
Chapter 8: LPC546xx Input multiplexing (INPUT MUX)155
- 8.1 How to read this chapter155
- 8.2 Features155
- 8.3 Basic configuration155
- 8.4 Pin description155
- 8.5 General description155
- 8.6 Register description159
Chapter 9: LPC546xx General Purpose I/O (GPIO)165
- 9.1 How to read this chapter165
- 9.2 Features165
- 9.3 Basic configuration165
- 9.4 General description165
- 9.5 Register description166
- 9.6 Functional description172
Chapter 10: LPC546xx Pin interrupt and pattern match (PINT)174
- 10.1 How to read this chapter174
- 10.2 Features174
- 10.3 Basic configuration175
  - 10.3.1 Configure pins as pin interrupts or as inputs to the pattern match engine175
- 10.4 Pin description176
- 10.5 General description176
  - 10.5.1 Pin interrupts176
  - 10.5.2 Pattern match engine176
    - 10.5.2.1 Example179
- 10.6 Register description180
- 10.7 Functional description193
Chapter 11: LPC546xx Group GPIO input interrupt (GINT0/1)197
- 11.1 Features197
- 11.2 Basic configuration197
- 11.3 General description197
- 11.4 Register description198
- 11.5 Functional description200
Chapter 12: LPC546xx DMA controller201
- 12.1 How to read this chapter201
- 12.2 Features201
- 12.3 Basic configuration201
- 12.4 Pin description202
- 12.5 General description202
- 12.6 Register description211
Chapter 13: LPC546xx SCTimer/PWM (SCT)226
- 13.1 How to read this chapter226
- 13.2 Features226
- 13.3 Basic configuration227
- 13.4 Pin description229
- 13.5 General description231
- 13.6 Register description233
- 13.7 Functional description257
Chapter 14: LPC546xx Standard counter/timers (CTIMER0 - 4)266
- 14.1 How to read this chapter266
- 14.2 Features266
- 14.3 Basic configuration266
- 14.4 General description267
- 14.5 Pin description269
  - 14.5.1 Multiple CAP and MAT pins269
- 14.6 Register description270
- 14.7 Functional description280
  - 14.7.1 Rules for single edge controlled PWM outputs280
  - 14.7.2 DMA operation281
Chapter 15: LPC546xx Windowed Watchdog Timer (WWDT)282
- 15.1 How to read this chapter282
- 15.2 Features282
- 15.3 Basic configuration283
- 15.4 Pin description283
- 15.5 General description283
- 15.6 Register description286
- 15.7 Functional description290
Chapter 16: LPC546xx Real-Time Clock (RTC)291
- 16.1 How to read this chapter291
- 16.2 Features291
- 16.3 Basic configuration291
  - 16.3.1 RTC timers292
- 16.4 General description293
- 16.5 Pin description294
- 16.6 Register description295
Chapter 17: LPC546xx Multi-Rate Timer (MRT)298
- 17.1 How to read this chapter298
- 17.2 Features298
- 17.3 Basic configuration298
- 17.4 Pin description298
- 17.5 General description298
- 17.6 Register description301
Chapter 18: LPC546xx Repetitive Interrupt Timer (RIT)306
- 18.1 How to read this chapter306
- 18.2 Features306
- 18.3 Basic configuration306
- 18.4 General description306
- 18.5 Register description308
- 18.6 RI timer operation311
Chapter 19: LPC546xx CPU system tick timer (SYSTICK)312
- 19.1 How to read this chapter312
- 19.2 Features312
- 19.3 Basic configuration312
- 19.4 General description312
- 19.5 Register description314
- 19.6 Functional description316
- 19.7 Example timer calculations316
Chapter 20: LPC546xx Micro-tick Timer (UTICK)317
- 20.1 How to read this chapter317
- 20.2 Features317
- 20.3 Basic configuration317
- 20.4 General description318
- 20.5 Pin description318
- 20.6 Register description319
Chapter 21: LPC546xx Flexcomm Interface serial communication321
- 21.1 How to read this chapter321
- 21.2 Introduction321
- 21.3 Features321
- 21.4 Basic configuration321
- 21.5 Architecture322
- 21.6 Pin description323
- 21.7 Register description324
  - 21.7.1 Peripheral Select and Flexcomm Interface ID register325
  - 21.7.2 Peripheral identification register326
Chapter 22: LPC546xx USARTs327
- 22.1 How to read this chapter327
- 22.2 Features327
- 22.3 Basic configuration328
  - 22.3.1 Configure the Flexcomm Interface clock and USART baud rate328
  - 22.3.2 Configure the USART for wake-up329
    - 22.3.2.1 Wake-up from sleep mode329
    - 22.3.2.2 Wake-up from deep-sleep mode329
- 22.4 Pin description331
- 22.5 General description332
- 22.6 Register description333
- 22.7 Functional description351
Chapter 23: LPC546xx Serial Peripheral Interfaces (SPI)356
- 23.1 How to read this chapter356
- 23.2 Features356
- 23.3 Basic configuration356
  - 23.3.1 Configure the SPI for wake-up357
    - 23.3.1.1 Wake-up from sleep mode357
    - 23.3.1.2 Wake-up from deep-sleep mode357
- 23.4 Pin description358
- 23.5 General description359
- 23.6 Register description360
- 23.7 Functional description375
Chapter 24: LPC546xx I2C-bus interfaces384
- 24.1 How to read this chapter384
- 24.2 Features384
- 24.3 Pin description384
- 24.4 Basic configuration385
- 24.5 General description391
- 24.6 Register description392
- 24.7 Functional description411
Chapter 25: LPC546xx I2S interface417
- 25.1 How to read this chapter417
- 25.2 Features417
- 25.3 Basic configuration418
- 25.4 Architecture419
- 25.5 Terminology419
- 25.6 Pin description420
- 25.7 Register description421
- 25.8 Functional description438
Chapter 26: LPC546xx Audio subsystem445
- 26.1 How to read this chapter445
- 26.2 Features445
- 26.3 Basic configuration445
- 26.4 Pin description447
- 26.5 General description450
- 26.6 Register description451
- 26.7 Functional description460
  - 26.7.1 HWVAD460
    - 26.7.1.1 Basic operations460
    - 26.7.1.2 Extended operation461
  - 26.7.2 DMIC462
Chapter 27: LPC546xx SD/MMC and SDIO interface468
- 27.1 How to read this chapter468
- 27.2 Features468
- 27.3 Basic configuration468
- 27.4 General description469
- 27.5 Pin description470
- 27.6 Register description471
- 27.7 Functional description491
  - 27.7.1 Power/pull-up control and card detection unit491
  - 27.7.2 Auto-Stop491
- 27.8 Programming the SD/MMC493
- 27.9 Clocking and timing guidelines529
Chapter 28: LPC546xx Smart Card Interface535
- 28.1 How to read this chapter535
- 28.2 Features535
- 28.3 Basic configuration535
- 28.4 Pin description535
- 28.5 Register description536
Chapter 29: LPC546xx SPI flash interface (SPIFI)549
- 29.1 How to read this chapter549
- 29.2 Features549
- 29.3 Basic configuration549
- 29.4 General description550
- 29.5 Pin description550
- 29.6 Supported devices551
- 29.7 SPIFI hardware551
- 29.8 Register description551
- 29.9 Functional description556
Chapter 30: LPC546xx External Memory Controller (EMC)561
- 30.1 How to read this chapter561
- 30.2 Introduction562
- 30.3 Features563
- 30.4 Basic configuration563
- 30.5 EMC functional description565
- 30.6 Low-power operation569
  - 30.6.1 Low-power SDRAM deep-sleep mode569
  - 30.6.2 Low-power SDRAM partial array refresh569
- 30.7 Memory bank select570
- 30.8 EMC Reset570
- 30.9 Address shift mode571
- 30.10 Memory mapped I/O and burst disable571
- 30.11 Using the EMC with SDRAM572
  - 30.11.1 Mode register setup572
- 30.12 Pin description574
- 30.13 Register description575
- 30.14 External static memory interface597
Chapter 31: LPC546xx LCD controller601
- 31.1 How to read this chapter601
- 31.2 Introduction601
- 31.3 Features601
- 31.4 Basic configuration604
- 31.5 Pin description605
  - 31.5.1 Signal usage605
- 31.6 LCD controller functional description607
- 31.7 Register description624
- 31.8 LCD timing diagrams641
- 31.9 LCD panel signal usage643
Chapter 32: LPC546xx Controller Area Network Flexible Data646
- 32.1 How to read this chapter646
- 32.2 Features646
- 32.3 Basic configuration646
- 32.4 General description647
- 32.5 Message RAM648
  - 32.5.1 Message RAM configuration648
- 32.6 Pin description648
- 32.7 Register description649
- 32.8 CAN protocol register description651
- 32.9 Rx buffer and FIFO element680
- 32.10 Tx buffer element682
- 32.11 Tx event FIFO element684
- 32.12 Standard message ID filter element686
- 32.13 Extended message ID filter element688
- 32.14 Functional description690
Chapter 33: LPC546xx Ethernet711
- 33.1 How to read this chapter711
- 33.2 Features711
- 33.3 Basic configuration711
- 33.4 General description712
- 33.5 Pin description713
- 33.6 Register description714
- 33.7 Functional description781
Chapter 34: LPC546xx USB0 Full-speed Device Controller856
- 34.1 How to read this chapter856
- 34.2 Features856
- 34.3 Basic configuration856
- 34.4 General description857
- 34.5 Pin description861
- 34.6 Register description862
- 34.7 Functional description871
Chapter 35: LPC546xx USB0 Full-speed Host controller879
- 35.1 How to read this chapter879
- 35.2 Introduction879
- 35.3 Features879
- 35.4 Architecture879
- 35.5 Basic configuration880
- 35.6 Interfaces882
  - 35.6.1 Pin description882
  - 35.6.2 Software interface882
    - 35.6.2.1 USB0 Host wake-up882
- 35.7 Register description883
- 35.8 USB Host Register Definitions902
Chapter 36: LPC546xx USB1 High-speed Device Controller903
- 36.1 How to read this chapter903
- 36.2 Features903
- 36.3 Basic configuration903
- 36.4 General description905
- 36.5 Pin description909
- 36.6 Register description910
- 36.7 Functional description918
Chapter 37: LPC546xx USB1 High-speed Host Controller926
- 37.1 How to read this chapter926
- 37.2 Introduction926
  - 37.2.1 Features926
  - 37.2.2 Architecture926
- 37.3 Basic configuration927
- 37.4 Interfaces928
  - 37.4.1 Pin description928
  - 37.4.2 Software interface929
- 37.5 Register description931
- 37.6 USB PHY low-power operation943
- 37.7 Proprietary Transfer Descriptor (PTD)943
Chapter 38: LPC546xx USB ROM API952
- 38.1 How to read this chapter952
- 38.2 Features952
- 38.3 General description952
  - 38.3.1 USB driver functions952
  - 38.3.2 Calling the USB device driver954
- 38.4 USB API955
Chapter 39: LPC546xx Flash signature generator994
- 39.1 How to read this chapter994
- 39.2 Features994
- 39.3 General description994
- 39.4 Register description995
- 39.5 Functional description997
  - 39.5.1 Algorithm and procedure for signature generation997
    - 39.5.1.1 Signature generation997
    - 39.5.1.2 Content verification998
Chapter 40: LPC546xx Power profiles/Power control API999
- 40.1 How to read this chapter999
- 40.2 Features999
- 40.3 General description999
- 40.4 API description999
- 40.5 Functional description1002
  - 40.5.1 Example low power mode control1002
    - 40.5.1.1 Enter sleep mode1002
    - 40.5.1.2 Enter deep-sleep mode and set up WWDT and BOD for wake-up1002
Chapter 41: LPC546xx Flash API1003
- 41.1 How to read this chapter1003
- 41.2 Features1003
- 41.3 General description1003
- 41.4 USART In-System Programming1007
- 41.5 I2C / SPI In-System Programming1017
  - 41.5.1 I2C / SPI commands1017
- 41.6 In-Application Programming1028
Chapter 42: LPC546xx Enhanced Code Read Protection (ECRP)1037
- 42.1 How to read this chapter1037
- 42.2 General Description1037
- 42.3 Feature controls1037
Chapter 43: LPC546xx 12-bit ADC controller (ADC)1041
- 43.1 How to read this chapter1041
- 43.2 Features1041
- 43.3 Basic configuration1041
- 43.4 Pin description1043
- 43.5 General description1045
- 43.6 Register description1046
- 43.7 Functional description1067
- 43.8 Examples1073
  - 43.8.1 Perform a single ADC conversion triggered by software1073
  - 43.8.2 Perform a sequence of conversions triggered by an external pin1074
Chapter 44: LPC546xx Temperature sensor1075
- 44.1 How to read this chapter1075
- 44.2 Features1075
- 44.3 Basic configuration1075
  - 44.3.1 Perform a single ADC conversion with the temperature sensor as ADC input1075
- 44.4 Pin description1075
- 44.5 Register description1075
Chapter 45: LPC546xx One-Time Programmable (OTP) memory and API1076
- 45.1 How to read this chapter1076
- 45.2 Features1076
- 45.3 Basic configuration1076
- 45.4 General description1076
- 45.5 OTP memory description1076
- 45.6 OTP API1079
  - 45.6.1 OTP function allocation1080
    - 45.6.1.1 OTP API error codes1083
Chapter 46: LPC546xx EEPROM memory1084
- 46.1 How to read this chapter1084
- 46.2 Features1084
- 46.3 Basic configuration1084
- 46.4 General description1084
- 46.5 Register description1085
  - 46.5.1 EEPROM control registers1086
  - 46.5.2 Interrupt registers1089
- 46.6 Functional description1091
  - 46.6.1 Initialization1091
  - 46.6.2 EEPROM operations1091
    - 46.6.2.1 Writing and erase/programming1091
Chapter 47: LPC546xx CRC engine1093
- 47.1 How to read this chapter1093
- 47.2 Features1093
- 47.3 Basic configuration1093
- 47.4 Pin description1093
- 47.5 General description1094
- 47.6 Register description1095
- 47.7 Functional description1097
Chapter 48: LPC546xx Serial Wire Debug (SWD)1098
- 48.1 How to read this chapter1098
- 48.2 Features1098
- 48.3 Basic configuration1098
- 48.4 Pin description1098
- 48.5 General description1100
- 48.6 Functional description1100
- 48.7 Debug configuration1104
  - 48.7.1 Cortex-M41104
Chapter 49: LPC546xx Random Number Generator (RNG)1105
- 49.1 How to read this chapter1105
- 49.2 Features1105
- 49.3 Basic configuration1105
- 49.4 General description1105
- 49.5 Random Number Generator API1105
- 49.6 Entropy of the generated random numbers1106
Chapter 50: ARM Cortex Appendix1107
- 50.1 ARM Cortex-M4 Details1107
  - 50.1.1 Cortex-M4 implementation options1107
Chapter 51: Supplementary information1108
- 51.1 Abbreviations1108
- 51.2 References1109
- 51.3 Legal information1110
- 51.4 Tables1111
- 51.5 Figures1130
- 51.6 Contents1132

Brand	NXP Semiconductors
Model	LPC546 Series
Category	Microcontrollers
Language	English

NXP Semiconductors LPC546 Series - User Manual

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