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| Architecture | Power Architecture |
|---|---|
| Core | e200z4 |
| Max CPU Frequency | 160 MHz |
| Flash Memory | 4 MB |
| RAM | 512 KB |
| Operating Voltage | 3.3 V |
| Operating Temperature | -40°C ~ 125°C |
| ADC | 12-bit |
| Timers | GPT, STM |
| Communication Interfaces | CAN, LIN, SPI, Ethernet |
| Oscillator Type | External oscillator |
| Package | 144-LQFP |
Thresholds for Low/High Voltage Detect (LVD/HVD) and voltage monitoring definitions.
Constraints and relationships for different power supplies during power-up/down sequences.
Estimated program and erase times for flash memory blocks.
Timing parameters for DSPI communication using CMOS and LVDS pads.
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