To Next PageTo Next Page
Need help?Do you have a question about the NXP Semiconductors KL25 Series and is the answer not in the manual?
General| Brand | NXP Semiconductors |
|---|---|
| Model | KL25 Series |
| Category | Microcontrollers |
| Language | English |
Introduces the KL25 sub-family as a highly-integrated, ultra low power 32-bit microcontroller.
Details the ARM Cortex-M0+ core and related modules like NVIC, AWIC, I/O Port, and Debug interfaces.
Lists system modules including SIM, SMC, PMC, and MCM.
Describes Flash memory and SRAM, including their sizes and controller.
Lists available clock modules, including Multipurpose Clock Generator (MCG) and System oscillator.
Lists analog modules like ADC, Analog comparators, 6-bit DAC, and 12-bit DAC.
Lists timer modules including Timer/PWM (TPM), Periodic interrupt timers (PIT), Low power timer (LPTMR), and Real-time counter (RTC).
Captures module interconnections, showing peripheral, signal, use case, control, and comment.
Summarizes the configuration of the ARM Cortex-M0+ core, including parameter settings.
Summarizes the configuration of the ARM Cortex-M0+ core, including parameter settings.
Lists system modules including SIM, SMC, PMC, and MCM.
Summarizes the configuration of the SIM module, referencing its dedicated chapter.
Summarizes the configuration of the SMC, referencing its dedicated chapter.
Summarizes the configuration of the PMC, referencing its dedicated chapter.
Summarizes the configuration of the LLWU, referencing its dedicated chapter.
Lists available clock modules, including Multipurpose Clock Generator (MCG) and System oscillator.
Summarizes the configuration of the MCG module, referencing its dedicated chapter.
Summarizes the configuration of the OSC module, referencing its dedicated chapter.
Describes Flash memory and SRAM, including their sizes and controller.
Summarizes the configuration of the Flash memory controller, referencing its dedicated chapter.
Summarizes the configuration of the SRAM, referencing its dedicated chapter.
Lists analog modules like ADC, Analog comparators, 6-bit DAC, and 12-bit DAC.
Summarizes the configuration of the 16-bit SAR ADC, referencing its dedicated chapter.
Summarizes the configuration of the Comparator (CMP), referencing its dedicated chapter.
Summarizes the configuration of the 12-bit DAC, referencing its dedicated chapter.
Lists timer modules including Timer/PWM (TPM), Periodic interrupt timers (PIT), Low power timer (LPTMR), and Real-time counter (RTC).
Summarizes the configuration of the Timer/PWM module, referencing its dedicated chapter.
Summarizes the configuration of the PIT, referencing its dedicated chapter.
Summarizes the configuration of the Low-power timer (LPTMR), referencing its dedicated chapter.
Describes communication interfaces like USB OTG, Serial peripheral interface (SPI), Inter-integrated circuit (I2C), and Universal asynchronous receiver/transmitters (UART).
Summarizes the orderable part numbers, CPU frequency, pin count, package, flash, RAM, and temperature range.
Shows the high-level device memory map, listing address ranges, destination slaves, and access types.
Details the flash memory and flash register locations at different base addresses.
Describes the BME hardware support for atomic read-modify-write operations.
Discusses basic reset mechanisms and sources, and how they can be configured.
Explains the POR circuit's function when power is initially applied or drops below a threshold.
Details how resetting the MCU provides a way to start processing from initial conditions.
Describes the various clocking modes supported on the device.
Compares various power modes available, detailing state retention and peripheral power down.
Explains flash module security based on FSEC[SEC] bits, limiting access to flash resources.
Shows the signals available on each pin and their locations on the devices, managed by Port Control Module.
Shows signals on pins and their locations, managed by Port Control Module for ALT functionality.
Details the fields of the Pin Control Register (PORTx_PCRn) for configuring pin behavior.
Explains how each port pin has a corresponding pin control register for configuration.
Describes the ARM CPU's primary modes (Run, Sleep, Deep Sleep) and their MCU counterparts (Run, Wait, Stop).
Details the LVD system for guarding against low-voltage conditions and controlling MCU system states.
Lists LLWU features including support for external pins, internal modules, and digital pin filters.
Details the primary purpose of DMAMUX for flexible DMA channel use and its two classes of channels.
Provides an overview of the DMA module, its channels, registers, and dual-address transfers.
Explains how the DMA module moves data within system memory with minimal processor intervention.
Lists key MCG features like FLL, PLL, internal reference clock generator, and control signals.
Lists FMC features including interface to bus masters, 32-bit program flash, and acceleration mechanisms.
Lists FTFA features such as sector size, protection scheme, and automated algorithms.
Lists ADC features including linear algorithm, input channels, output modes, and low-power operation.
