UARTx_C4 field descriptions (continued)
Field Description
5
M10
10-bit Mode select
The M10 bit causes a tenth bit to be part of the serial transmission. This bit should only be changed when
the transmitter and receiver are both disabled.
0 Receiver and transmitter use 8-bit or 9-bit data characters.
1 Receiver and transmitter use 10-bit data characters.
4–0
OSR
Over Sampling Ratio
This field configures the oversampling ratio for the receiver between 4x (00011) and 32x (11111). Writing
an invalid oversampling ratio will default to an oversampling ratio of 16 (01111). This field should only be
changed when the transmitter and receiver are both disabled.
39.2.12 UART Control Register 5 (UARTx_C5)
Address: Base address + Bh offset
Bit 7 6 5 4 3 2 1 0
Read
TDMAE
0
RDMAE
0
BOTHEDGE
RESYNCDI
S
Write
Reset
0 0 0 0 0 0 0 0
UARTx_C5 field descriptions
Field Description
7
TDMAE
Transmitter DMA Enable
TDMAE configures the transmit data register empty flag, S1[TDRE], to generate a DMA request.
0 DMA request disabled.
1 DMA request enabled.
6
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
5
RDMAE
Receiver Full DMA Enable
RDMAE configures the receiver data register full flag, S1[RDRF], to generate a DMA request.
0 DMA request disabled.
1 DMA request enabled.
4–2
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
1
BOTHEDGE
Both Edge Sampling
Enables sampling of the received data on both edges of the baud rate clock, effectively doubling the
number of times the receiver samples the input data for a given oversampling ratio. This bit must be set for
oversampling ratios between x4 and x7 and is optional for higher oversampling ratios. This bit should only
be changed when the receiver is disabled.
Table continues on the next page...
Chapter 39 Universal Asynchronous Receiver/Transmitter (UART0)
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 737
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