NXP Semiconductors KL25 Series - System Options Register 2 (SIM_SOPT2)

SIM_SOPT1CFG field descriptions (continued)
Field Description
0 SOPT1 USBSSTB cannot be written.
1 SOPT1 USBSSTB can be written.
25
UVSWE
USB voltage regulator VLP standby write enable
Writing one to the UVSWE bit allows the SOPT1 USBVSTBY bit to be written. This register bit clears after
a write to USBVSTBY.
0 SOPT1 USBVSTB cannot be written.
1 SOPT1 USBVSTB can be written.
24
URWE
USB voltage regulator enable write enable
Writing one to the URWE bit allows the SOPT1 USBREGEN bit to be written. This register bit clears after
a write to USBREGEN.
0 SOPT1 USBREGEN cannot be written.
1 SOPT1 USBREGEN can be written.
23–0
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
12.2.3 System Options Register 2 (SIM_SOPT2)
SOPT2 contains the controls for selecting many of the module clock source options on
this device. See the Clock Distribution chapter for more information including clocking
diagrams and definitions of device clocks.
Address: 4004_7000h base + 1004h offset = 4004_8004h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
UART0SRC TPMSRC
0
USBSRC
0
PLLFLLSEL
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
CLKOUTSEL
RTCCLKOUTS
EL
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Chapter 12 System integration module (SIM)
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 195