NXP Semiconductors KL25 Series - PMC 1-Khz LPO Clock; COP Clocking

Table 5-2. Module clocks (continued)
Module Bus interface clock Internal clocks I/O interface clocks
ADC Bus clock OSCERCLK —
CMP Bus clock — —
DAC Bus clock — —
Timers
TPM Bus clock TPM clock TPM_CLKIN0, TPM_CLKIN1
PIT Bus clock — —
LPTMR Bus clock LPO, OSCERCLK,
MCGIRCLK, ERCLK32K
—
RTC Bus clock ERCLK32K RTC_CLKOUT
Communication interfaces
USB FS OTG System clock USB FS clock —
SPI0 Bus clock — SPI0_SCK
SPI1 System clock — SPI1_SCK
I
2
C0 Bus clock — I2C0_SCL
I
2
C1 Bus clock — I2C1_SCL
UART0 Bus clock UART0 clock —
UART1 , UART2 Bus clock — —
Human-machine interfaces
GPIO Platform clock — —
TSI Bus clock — —
5.7.1 PMC 1-kHz LPO clock
The Power Management Controller (PMC) generates a 1-kHz clock that is enabled in all
modes of operation, including all low power modes except VLLS0. This 1-kHz source is
commonly referred to as LPO clock or 1-kHz LPO clock.
5.7.2 COP clocking
The COP may be clocked from two clock sources as shown in the following figure.
Module clocks
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
122 Freescale Semiconductor, Inc.