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NXP Semiconductors KL25 Series - I2 C Address Register 2 (I2 Cx_A2)

NXP Semiconductors KL25 Series
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38.3.10 I2C Address Register 2 (I2Cx_A2)
Address: Base address + 9h offset
Bit 7 6 5 4 3 2 1 0
Read
SAD
0
Write
Reset
1 1 0 0 0 0 1 0
I2Cx_A2 field descriptions
Field Description
7–1
SAD
SMBus Address
Contains the slave address used by the SMBus. This field is used on the device default address or other
related addresses.
0
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
38.3.11 I2C SCL Low Timeout Register High (I2Cx_SLTH)
Address: Base address + Ah offset
Bit 7 6 5 4 3 2 1 0
Read
SSLT[15:8]
Write
Reset
0 0 0 0 0 0 0 0
I2Cx_SLTH field descriptions
Field Description
7–0
SSLT[15:8]
Most significant byte of SCL low timeout value that determines the timeout period of SCL low.
38.3.12 I2C SCL Low Timeout Register Low (I2Cx_SLTL)
Address: Base address + Bh offset
Bit 7 6 5 4 3 2 1 0
Read
SSLT[7:0]
Write
Reset
0 0 0 0 0 0 0 0
I2Cx_SLTL field descriptions
Field Description
7–0
SSLT[7:0]
Least significant byte of SCL low timeout value that determines the timeout period of SCL low.
Chapter 38 Inter-Integrated Circuit (I2C)
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 701

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