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NXP Semiconductors KL25 Series - MCG Control 9 Register (MCG_C9)

NXP Semiconductors KL25 Series
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MCG_C8 field descriptions (continued)
Field Description
0 Interrupt request is generated on a PLL loss of lock indication. The PLL loss of lock interrupt enable bit
must also be set to generate the interrupt request.
1 Generate a reset request on a PLL loss of lock indication.
5
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
4–1
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
0
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
24.3.13 MCG Control 9 Register (MCG_C9)
Address: 4006_4000h base + Eh offset = 4006_400Eh
Bit 7 6 5 4 3 2 1 0
Read 0 0
Write
Reset
0 0 0 0 0 0 0 0
MCG_C9 field descriptions
Field Description
7–4
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
3–0
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
24.3.14 MCG Control 10 Register (MCG_C10)
Address: 4006_4000h base + Fh offset = 4006_400Fh
Bit 7 6 5 4 3 2 1 0
Read 0 0
Write
Reset
0 0 0 0 0 0 0 0
MCG_C10 field descriptions
Field Description
7–4
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
3–0
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
Chapter 24 Multipurpose Clock Generator (MCG)
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 383

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