NXP Semiconductors KL25 Series - Communication Interfaces

Table 10-10. TPM 1 Signal Descriptions (continued)
Chip signal name Module signal
name
Description I/O
TPM1_CH[1:0] TPM_CHn TPM channel (n = 5 to 0) I/O
Table 10-11. TPM 2 Signal Descriptions
Chip signal name Module signal
name
Description I/O
TPM_CLKIN[2:0] TPM_EXTCLK External clock. TPM external clock can be selected to increment the
TPM counter on every rising edge synchronized to the counter
clock.
I
TPM2_CH[1:0] TPM_CHn TPM channel (n = 5 to 0) I/O
Table 10-12. LPTMR 0 Signal Descriptions
Chip signal name Module signal
name
Description I/O
LPTMR0_ALT[2:1] LPTMR_ALTn Pulse Counter Input pin I
Table 10-13. RTC Signal Descriptions
Chip signal name Module signal
name
Description I/O
RTC_CLKOUT
1
RTC_CLKOUT 1 Hz square-wave output O
1. RTC_CLKOUT can also be driven with OSCERCLK via SIM control bit SIM_SOPT[RCTCLKOUTSEL]
10.4.7 Communication Interfaces
Table 10-14. USB FS OTG Signal Descriptions
Chip signal name Module signal
name
Description I/O
USB0_DM usb_dm USB D- analog data signal on the USB bus. I/O
USB0_DP usb_dp USB D+ analog data signal on the USB bus. I/O
USB_CLKIN — Alternate USB clock input I
Table 10-15. USB VREG Signal Descriptions
Chip signal name Module signal
name
Description I/O
VOUT33 reg33_out Regulator output voltage O
VREGIN reg33_in Unregulated power supply I
Chapter 10 Signal Multiplexing and Signal Descriptions
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 171