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NXP Semiconductors KL25 Series - Peripheral Bridge Configuration

NXP Semiconductors KL25 Series
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Table 3-17. Reference links to related information (continued)
Topic Related module Reference
Crossbar switch slave Peripheral bridge Peripheral bridge
2-ported peripheral GPIO controller GPIO controleer
3.4.6.1 Crossbar-Light Switch Master Assignments
The masters connected to the crossbar switch are assigned as follows:
Master module Master port number
ARM core unified bus 0
DMA 2
USB OTG 3
3.4.6.2 Crossbar Switch Slave Assignments
This device contains 3 slaves connected to the crossbar switch.
The slave assignment is as follows:
Slave module Slave port number
Flash memory controller 0
SRAM controller 1
Peripheral bridge 0 2
3.4.7 Peripheral Bridge Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
System Modules
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
62 Freescale Semiconductor, Inc.

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