NXP Semiconductors KL25 Series - Flash Configuration Register 2 (SIM_FCFG2); Unique Identification Register MID-High (SIM_UIDMH)

12.2.14 Flash Configuration Register 2 (SIM_FCFG2)
Address: 4004_7000h base + 1050h offset = 4004_8050h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0 MAXADDR0 1 0
W
Reset
0 * * * * * * * 1 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
* Notes:
MAXADDR0 field: Device specific value indicating amount of implemented flash.•
SIM_FCFG2 field descriptions
Field Description
31
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
30–24
MAXADDR0
Max address block
This field concatenated with leading zeros indicates the first invalid address of program flash.
For example, if MAXADDR0 = 0x10 the first invalid address of program flash is 0x0002_0000. This would
be the MAXADDR0 value for a device with 128 KB program flash.
23
Reserved
This field is reserved.
This read-only field is reserved and always has the value 1.
22–16
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
15–0
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
12.2.15 Unique Identification Register Mid-High (SIM_UIDMH)
Address: 4004_7000h base + 1058h offset = 4004_8058h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0 UID
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 * * * * * * * * * * * * * * * *
* Notes:
UID field: Device specific value.•
Chapter 12 System integration module (SIM)
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 213