NXP Semiconductors KL25 Series - Memory Map;Register Definitions; OSC Memory Map;Register Definition

OSC
V
SS
Clock Input
I/O
XTAL
EXTAL
Figure 25-5. External Clock Connections
25.7 Memory Map/Register Definitions
Some oscillator module register bits are typically incorporated into other peripherals such
as MCG or SIM.
OSC Memory Map/Register Definition
OSC memory map
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4006_5000 OSC Control Register (OSC0_CR) 8 R/W 00h 25.71.1/409
25.71.1 OSC Control Register (OSCx_CR)
NOTE
After OSC is enabled and starts generating the clocks, the
configurations such as low power and frequency range, must
not be changed.
Address: 4006_5000h base + 0h offset = 4006_5000h
Bit 7 6 5 4 3 2 1 0
Read
ERCLKEN
0
EREFSTEN
0
SC2P SC4P SC8P SC16P
Write
Reset
0 0 0 0 0 0 0 0
OSCx_CR field descriptions
Field Description
7
ERCLKEN
External Reference Enable
Enables external reference clock (OSCERCLK).
Table continues on the next page...
25.7.1
Chapter 25 Oscillator (OSC)
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 409