NXP Semiconductors KL25 Series - I2 C Smbus Control and Status Register (I2 Cx_Smb)

I2Cx_RA field descriptions (continued)
Field Description
This field contains the slave address to be used by the I2C module. The field is used in the 7-bit address
scheme. Any nonzero write enables this register. This register's use is similar to that of the A1 register, but
in addition this register can be considered a maximum boundary in range matching mode.
0
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
38.3.9 I2C SMBus Control and Status register (I2Cx_SMB)
NOTE
When the SCL and SDA signals are held high for a length of
time greater than the high timeout period, the SHTF1 flag sets.
Before reaching this threshold, while the system is detecting
how long these signals are being held high, a master assumes
that the bus is free. However, the SHTF1 bit rises in the bus
transmission process with the idle bus state.
NOTE
When the TCKSEL bit is set, there is no need to monitor the
SHTF1 bit because the bus speed is too high to match the
protocol of SMBus.
Address: Base address + 8h offset
Bit 7 6 5 4 3 2 1 0
Read
FACK ALERTEN SIICAEN TCKSEL
SLTF SHTF1 SHTF2
SHTF2IE
Write w1c w1c
Reset
0 0 0 0 0 0 0 0
I2Cx_SMB field descriptions
Field Description
7
FACK
Fast NACK/ACK Enable
For SMBus packet error checking, the CPU must be able to issue an ACK or NACK according to the result
of receiving data byte.
0 An ACK or NACK is sent on the following receiving data byte
1 Writing 0 to TXAK after receiving a data byte generates an ACK. Writing 1 to TXAK after receiving a
data byte generates a NACK.
6
ALERTEN
SMBus Alert Response Address Enable
Enables or disables SMBus alert response address matching.
NOTE: After the host responds to a device that used the alert response address, you must use software
to put the device's address on the bus. The alert protocol is described in the SMBus specification.
Table continues on the next page...
Chapter 38 Inter-Integrated Circuit (I2C)
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 699