NXP Semiconductors KL25 Series - 3.6.3 SRAM Configuration

Flash memory
controller
Transfers
Transfers
Flash memory
Crossbar switch
MCM
Figure 3-18. Flash memory controller configuration
Table 3-28. Reference links to related information
Topic Related module Reference
Full description Flash memory
controller
Flash memory controller
System memory map System memory map
Clocking Clock Distribution
Transfers Flash memory Flash memory
Transfers Crossbar switch Crossbar Switch
Register access MCM MCM
3.6.3 SRAM Configuration
This section summarizes how the module has been configured in the chip.
SRAM upper
Transfers
Cortex-M0+
core
switch
SRAM lower
crossbar
SRAM
controller
Figure 3-19. SRAM configuration
Table 3-29. Reference links to related information
Topic Related module Reference
Full description SRAM SRAM
System memory map System memory map
Clocking Clock Distribution
ARM Cortex-M0+ core ARM Cortex-M0+ core
Chapter 3 Chip Configuration
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 75