NXP Semiconductors KL25 Series - Chapter 40 Universal Asynchronous Receiver;Transmitter (UART1 and UART2); 40.1.1 Features

Chapter 40
Universal Asynchronous Receiver/Transmitter
(UART1 and UART2)
40.1 Introduction
40.1.1 Features
Features of UART module include:
• Full-duplex, standard non-return-to-zero (NRZ) format
• Double-buffered transmitter and receiver with separate enables
• Programmable baud rates (13-bit modulo divider)
• Interrupt-driven or polled operation:
• Transmit data register empty and transmission complete
• Receive data register full
• Receive overrun, parity error, framing error, and noise error
• Idle receiver detect
• Active edge on receive pin
• Break detect supporting LIN
• Hardware parity generation and checking
• Programmable 8-bit or 9-bit character length
• Programmable 1-bit or 2-bit stop bits
• Receiver wakeup by idle-line or address-mark
• Optional 13-bit break character generation / 11-bit break character detection
• Selectable transmitter output polarity
• 5-channel DMA interface
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 747