The length of the break character is affected by the UART_S2[BRK13] and
UART_C1[M] bits as shown below.
Table 40-31. Break character length
BRK13 M SBNS Break character length
0 0 0 10 bit times
0 0 1 11 bit times
0 1 0 11 bit times
0 1 1 12 bit times
1 0 0 13 bit times
1 0 1 14 bit times
1 1 0 14 bit times
1 1 1 15 bit times
40.3.3 Receiver functional description
In this section, the receiver block diagram is a guide for the overall receiver functional
description. Next, the data sampling technique used to reconstruct receiver data is
described in more detail. Finally, two variations of the receiver wakeup function are
explained.
The receiver input is inverted by setting UART_S2[RXINV]. The receiver is enabled by
setting the UART_C2[RE] bit. Character frames consist of a start bit of logic 0, eight (or
nine) data bits (lsb first), and one (or two) stop bits of logic 1. For information about 9-bit
data mode, refer to 8- and 9-bit data modes. For the remainder of this discussion, assume
the UART is configured for normal 8-bit data mode.
After receiving the stop bit into the receive shifter, and provided the receive data register
is not already full, the data character is transferred to the receive data register and the
receive data register full (UART_S1[RDRF]) status flag is set. If UART_S1[RDRF] was
already set indicating the receive data register (buffer) was already full, the overrun (OR)
status flag is set and the new data is lost. Because the UART receiver is double-buffered,
the program has one full character time after UART_S1[RDRF] is set before the data in
the receive data buffer must be read to avoid a receiver overrun.
When a program detects that the receive data register is full (UART_S1[RDRF] = 1), it
gets the data from the receive data register by reading UART_D. The UART_S1[RDRF]
flag is cleared automatically by a two-step sequence normally satisfied in the course of
the user's program that manages receive data. Refer to Interrupts and status flags for more
details about flag clearing.
Functional description
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
764 Freescale Semiconductor, Inc.