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NXP Semiconductors KL25 Series - Freescale Semiconductor, Inc

NXP Semiconductors KL25 Series
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GPIO memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
400F_F008 Port Clear Output Register (GPIOA_PCOR) 32
W
(always
reads 0)
0000_0000h 41.2.3/776
400F_F00C Port Toggle Output Register (GPIOA_PTOR) 32
W
(always
reads 0)
0000_0000h 41.2.4/777
400F_F010 Port Data Input Register (GPIOA_PDIR) 32 R 0000_0000h 41.2.5/777
400F_F014 Port Data Direction Register (GPIOA_PDDR) 32 R/W 0000_0000h 41.2.6/778
400F_F040 Port Data Output Register (GPIOB_PDOR) 32 R/W 0000_0000h 41.2.1/775
400F_F044 Port Set Output Register (GPIOB_PSOR) 32
W
(always
reads 0)
0000_0000h 41.2.2/776
400F_F048 Port Clear Output Register (GPIOB_PCOR) 32
W
(always
reads 0)
0000_0000h 41.2.3/776
400F_F04C Port Toggle Output Register (GPIOB_PTOR) 32
W
(always
reads 0)
0000_0000h 41.2.4/777
400F_F050 Port Data Input Register (GPIOB_PDIR) 32 R 0000_0000h 41.2.5/777
400F_F054 Port Data Direction Register (GPIOB_PDDR) 32 R/W 0000_0000h 41.2.6/778
400F_F080 Port Data Output Register (GPIOC_PDOR) 32 R/W 0000_0000h 41.2.1/775
400F_F084 Port Set Output Register (GPIOC_PSOR) 32
W
(always
reads 0)
0000_0000h 41.2.2/776
400F_F088 Port Clear Output Register (GPIOC_PCOR) 32
W
(always
reads 0)
0000_0000h 41.2.3/776
400F_F08C Port Toggle Output Register (GPIOC_PTOR) 32
W
(always
reads 0)
0000_0000h 41.2.4/777
400F_F090 Port Data Input Register (GPIOC_PDIR) 32 R 0000_0000h 41.2.5/777
400F_F094 Port Data Direction Register (GPIOC_PDDR) 32 R/W 0000_0000h 41.2.6/778
400F_F0C0 Port Data Output Register (GPIOD_PDOR) 32 R/W 0000_0000h 41.2.1/775
400F_F0C4 Port Set Output Register (GPIOD_PSOR) 32
W
(always
reads 0)
0000_0000h 41.2.2/776
400F_F0C8 Port Clear Output Register (GPIOD_PCOR) 32
W
(always
reads 0)
0000_0000h 41.2.3/776
400F_F0CC Port Toggle Output Register (GPIOD_PTOR) 32
W
(always
reads 0)
0000_0000h 41.2.4/777
400F_F0D0 Port Data Input Register (GPIOD_PDIR) 32 R 0000_0000h 41.2.5/777
400F_F0D4 Port Data Direction Register (GPIOD_PDDR) 32 R/W 0000_0000h 41.2.6/778
Memory map and register definition
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
774 Freescale Semiconductor, Inc.

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