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NXP Semiconductors KL25 Series - Chapter 39 Universal Asynchronous Receiver;Transmitter (UART0); 39.1.1 Features

NXP Semiconductors KL25 Series
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Chapter 39
Universal Asynchronous Receiver/Transmitter
(UART0)
39.1 Introduction
39.1.1 Features
Features of the UART module include:
Full-duplex, standard non-return-to-zero (NRZ) format
Double-buffered transmitter and receiver with separate enables
Programmable baud rates (13-bit modulo divider)
Transmit and receive baud rate can operate asynchronous to the bus clock:
Baud rate can be configured independently of the bus clock frequency
Supports operation in Stop modes
Configurable receiver buad rate oversampling ratio from 4x to 32x
Interrupt, DMA or polled operation:
Transmit data register empty and transmission complete
Receive data register full
Receive overrun, parity error, framing error, and noise error
Idle receiver detect
Active edge on receive pin
Break detect supporting LIN
Hardware parity generation and checking
Programmable 8-bit, 9-bit or 10-bit character length
Programmable 1-bit or 2-bit stop bits
Receiver wakeup by idle-line, address-mark or address match
Optional 13-bit break character generation / 11-bit break character detection
Selectable transmitter output and receiver input polarity
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 721

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