NXP Semiconductors KL25 Series - Freescale Semiconductor, Inc

Address: Base address + 50h offset
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
TOF
0
CH5F CH4F CH3F CH2F CH1F CH0F
W
w1c w1c w1c w1c w1c w1c w1c
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
TPMx_STATUS field descriptions
Field Description
31–9
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
8
TOF
Timer Overflow Flag
See register description
0 LPTPM counter has not overflowed.
1 LPTPM counter has overflowed.
7–6
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
5
CH5F
Channel 5 Flag
See the register description.
0 No channel event has occurred.
1 A channel event has occurred.
4
CH4F
Channel 4 Flag
See the register description.
0 No channel event has occurred.
1 A channel event has occurred.
3
CH3F
Channel 3 Flag
See the register description.
0 No channel event has occurred.
1 A channel event has occurred.
Table continues on the next page...
Memory Map and Register Definition
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
558 Freescale Semiconductor, Inc.