NXP Semiconductors KL25 Series - 3.4 System Modules; 3.4.1 SIM Configuration

Table 3-10. AWIC stop wake-up sources (continued)
Wake-up source Description
CMP0 Interrupt in normal or trigger mode
I
2
Cx Address match wakeup
UART0 Any interrupt provided clock remains enabled
UART1 and UART2 Active edge on RXD
RTC Alarm or seconds interrupt
TSI Any interrupt
NMI NMI pin
TPMx Any interrupt provided clock remains enabled
LPTMR Any interrupt provided clock remains enabled
SPI Slave mode interrupt
System Modules
3.4.1 SIM Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Register
access
Peripheral
bridge
System integration
module (SIM)
Figure 3-4. SIM configuration
Table 3-11. Reference links to related information
Topic Related module Reference
Full description SIM SIM
System memory map System memory map
Clocking Clock distribution
Power management Power management
3.4
System Modules
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
56 Freescale Semiconductor, Inc.