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NXP Semiconductors KL25 Series - Core Modules

NXP Semiconductors KL25 Series
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10.4.1 Core Modules
Table 10-3. SWD Signal Descriptions
Chip signal name Module signal
name
Description I/O
SWD_DIO SWD_DIO Serial wire debug data input/output. The SWD_DIO pin is used by
an external debug tool for communication and device control. This
pin is pulled up internally.
Input /
Output
SWD_CLK SWD_CLK Serial Wire Clock. This pin is the clock for debug logic when in the
Serial Wire Debug mode. This pin is pulled down internally.
Input
10.4.2 System Modules
Table 10-4. System Signal Descriptions
Chip signal name Module signal
name
Description I/O
NMI Non-maskable interrupt
NOTE: Driving the NMI signal low forces a non-maskable
interrupt, if the NMI function is selected on the
corresponding pin.
I
RESET Reset bi-directional signal I/O
VDD MCU power I
VSS MCU ground I
10.4.3 Clock Modules
Table 10-5. OSC Signal Descriptions
Chip signal name Module signal
name
Description I/O
EXTAL0 EXTAL External clock/Oscillator input I
XTAL0 XTAL Oscillator output O
10.4.4 Memories and Memory Interfaces
Chapter 10 Signal Multiplexing and Signal Descriptions
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
Freescale Semiconductor, Inc. 169

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