NXP Semiconductors KL25 Series - Page 196

SIM_SOPT2 field descriptions
Field Description
31–28
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
27–26
UART0SRC
UART0 clock source select
Selects the clock source for the UART0 transmit and receive clock.
00 Clock disabled
01 MCGFLLCLK clock or MCGPLLCLK/2 clock
10 OSCERCLK clock
11 MCGIRCLK clock
25–24
TPMSRC
TPM clock source select
Selects the clock source for the TPM counter clock
00 Clock disabled
01 MCGFLLCLK clock or MCGPLLCLK/2
10 OSCERCLK clock
11 MCGIRCLK clock
23–19
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
18
USBSRC
USB clock source select
Selects the clock source for the USB 48 MHz clock.
0 External bypass clock (USB_CLKIN).
1 MCGPLLCLK/2 or MCGFLLCLK clock
17
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
16
PLLFLLSEL
PLL/FLL clock select
Selects the MCGPLLCLK or MCGFLLCLK clock for various peripheral clocking options.
0 MCGFLLCLK clock
1 MCGPLLCLK clock with fixed divide by two
15–8
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
7–5
CLKOUTSEL
CLKOUT select
Selects the clock to output on the CLKOUT pin.
000 Reserved
001 Reserved
010 Bus clock
011 LPO clock (1 kHz)
100 MCGIRCLK
101 Reserved
110 OSCERCLK
111 Reserved
4
RTCCLKOUTSEL
RTC clock out select
Table continues on the next page...
Memory map and register definition
KL25 Sub-Family Reference Manual, Rev. 3, September 2012
196 Freescale Semiconductor, Inc.