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NXP Semiconductors MPC5746R User Manual

NXP Semiconductors MPC5746R
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TCK
5
10
9
8
6
TMS, TDI
TDO
7
Figure 28. Nexus TDI, TMS, TDO timing
18.1.3
Aurora LVDS interface timing
Table 37. Aurora LVDS interface timing specifications
Symbol Parameter
Value
Unit
Min Typ Max
Data Rate
Data rate 1250 Mbps
STARTUP
t
STRT_BIAS
Bias startup time
1
5 µs
t
STRT_TX
Transmitter startup time
2
5 µs
t
STRT_RX
Receiver startup time
3
4 µs
1. Startup time is defined as the time taken by LVDS current reference block for settling bias current after its pwr_down
(power down) has been deasserted. LVDS functionality is guaranteed only after the startup time.
2. Startup time is defined as the time taken by LVDS transmitter for settling after its pwr_down (power down) has been
deasserted. Here it is assumed that current reference is already stable (see Bias start-up time). LVDS functionality is
guaranteed only after the startup time.
AC specifications
SPC5746R Microcontroller Data Sheet, Rev. 6, 06/2017
NXP Semiconductors 63

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NXP Semiconductors MPC5746R Specifications

General IconGeneral
ArchitecturePower Architecture
Coree200z4
Max CPU Frequency160 MHz
Flash Memory4 MB
RAM512 KB
Operating Voltage3.3 V
Operating Temperature-40°C ~ 125°C
ADC12-bit
TimersGPT, STM
Communication InterfacesCAN, LIN, SPI, Ethernet
Oscillator TypeExternal oscillator
Package144-LQFP

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