Omron Sysmac CP1H User Manual

1
8
19
I
tem
Power su
pp
l
y
Operatin
g
volta
g
e ran
ge
Power consum
p
tio
n
100 to 240 VAC 50
/
60 H
z
85
to
2
6
4 VA
C
1
00
VA m
a
x
.
24 VD
C
20.4 to 26.4 VDC (21.6 to 26.4 VDC with four or more Ex
p
ansion Units.
)
50
W m
a
x
.
Inr
us
h
cu
rr
e
n
t
100 to 120 VAC in
p
uts: 20 A max. 8 ms max./200 to 240 VAC in
p
uts: 40 A max. 8 ms max
.
30
A m
a
x. 2
0
m
s
m
a
x
.
External
p
ower su
pp
l
y
300
mA
at
24 VD
C
N
o
n
e
In
su
l
at
i
o
n r
es
i
sta
n
ce
Dielectric strengt
h
20 MW min.
(
at 500 VDC
)
between the external AC terminals
a
n
d
G
R
te
rmin
a
l
s
2
,
300 VAC at 50/60 Hz for 1 min between the external AC and
GR terminals, leaka
g
e current: 5 mA max
.
Noise immunit
y
Conformin
g
to IEC 61000-4-4. 2 kV (power supply line
)
Vi
b
r
at
i
o
n r
es
i
sta
n
ce
10 to 57 Hz, 0.075-mm am
p
litude, 57 to 150 Hz, acceleration: 9.8 m/s2 in X, Y, and Z directions for 80 minutes eac
h
(Swee
p
time: 8 minutes x 10 swee
p
s = total time 80 minutes)
S
h
oc
k r
es
i
sta
n
ce
2
,
three times each in X
,
Y
,
and Z direction
s
Ambient o
p
eratin
g
tem
p
eratur
e
0
to
55
C
Ambient humidit
y
10% to 90%
(
with no condensation
)
Ambient o
p
eratin
g
environmen
t
No corrosive
g
a
s
Ambient stora
g
e tem
p
eratur
e
–
2
0
to
7
5
°
C (Excludin
g
battery.
)
Power holdin
g
tim
e
1
0
m
s
min
.
Dim
e
n
s
i
o
n
s
150 x 90 x 85 mm
(
W x H x D
)
Wei
g
h
t
740
g
max
.
2 m
s
min
.
590
g
max
.
20 MW min.
(
at 500 VDC
)
between the external DC terminals
a
n
d
G
R
te
rmin
a
l
s
1
,
000 VAC at 50/60 Hz for 1 min between the external DC and
GR terminals, leaka
g
e current: 5 mA max
.
AC power supply models: CP1H- -A
DC power supply models: CP1H-
-D
I
tem
Peri
p
heral USB
p
or
t
For connectin
g
Peripheral Device
.
Serial
p
ort
1
Serial
p
ort
2
N
ote
: Serial PLC Link can be used with either serial
p
ort 1 or serial
p
ort 2
.
The CP1W-CIF01 RS-232C O
p
tion Boar
d
or the CP1W-CIF11 RS-422A/485 O
p
tion Boar
d
can be used with either
p
ort
.
Conforms to USB 1.1, B-t
yp
e connecto
r
F
u
n
ct
i
on
In
te
rf
ace
I
tem
Number of analo
g
in
p
uts
Number of out
p
ut
s
4
2 out
p
ut
s
0
to
2
0
mA
o
r 4
to
2
0
m
A
All
o
w
ab
l
e
e
x
te
rn
a
l
out
p
ut load resistanc
e
External out
p
ut
im
p
edanc
e
R
eso
l
ut
i
on
Ω
min.
0
.
5
Ω
m
a
x
.
1/6
,
000 or 1/12
,
000 (full scale
)
Overall accurac
y
2
5
°
C
:
±
0.4% full scale
/
0 to 5
5
°
C
:
±
0.8
%
full scal
e
D
/
A conversion dat
a
Co
nv
e
r
s
i
o
n
t
im
e
Full scale for other ran
g
es: 0000 to 1770 (2EE0) he
x
1 ms/
p
oint
I
so
l
at
i
o
n m
et
h
od
Photocoupler isolation between analo
g
I/O terminals and internal circuits. No isolation between analo
g
I/O si
g
nals
.
600
Ω
m
a
x
.
Input si
g
nal ran
ge
0 to 5 V
,
1 to 5 V
,
0 to 10 V
,
or -10 to 10
V
Max. rated in
p
u
t
1
5
V
0
to
2
0
mA
o
r 4
to
2
0
m
A
±
30
m
A
Ω
min.
A
pp
rox. 250
Ω
R
eso
l
ut
i
on
1/6
,
000 or 1/12
,
000 (full scale
)
Overall accurac
y
A/D conversion dat
a
2
5
°
C
:
±
0.3% full scale
/
0 to 5
5
°
C
:
±
0.6
%
full scal
e
F
u
ll
sca
l
e
f
o
r
–
10 to 10 V: F448
(
E890
)
to 0BB8
(
1770
)
He
x
Avera
g
in
g
Su
pp
orted (Set for individual in
p
uts in the PLC Setu
p
.
)
O
p
en-circuit detectio
n
Su
pp
orted (Value when disconnected: 8000 Hex
)
2
5
°
C
:
±
0.4% full scale
/
0 to 5
5
°
C
:
±
0.8
%
full scal
e
Volta
g
e I/
O
Current I
/
O
I
tem
Co
n
t
r
o
l m
et
h
od
Stored pro
g
ram metho
d
I
/
O control metho
d
Cyclic scan with immediate refreshin
g
Program languag
e
Ladder diagra
m
F
u
n
ct
i
o
n
b
l
oc
k
s
M
a
xim
u
m n
u
m
be
r
o
f f
u
n
ct
i
o
n
b
l
oc
k
de
fini
t
i
o
n
s
: 12
8
M
a
xim
u
m n
u
m
be
r
o
f in
sta
n
ces
: 2
56
Lan
g
ua
g
es usable in
f
unction block de
f
initions: Ladder dia
g
rams, structured text (
S
T
)
Instruction len
g
t
h
1 to 7 ste
p
s
p
er instructio
n
In
st
r
uct
i
o
n
s
Approx. 400 (function codes: 3 di
g
its
)
In
st
r
uct
i
o
n
e
x
ecut
i
o
n
t
im
e
B
as
i
c
in
st
r
uct
i
o
n
s
:
0
.1
0
µ
s min. S
p
ecial instructions: 0.15
µ
s
min
.
Common processin
g
tim
e
0
.7 m
s
Pro
g
ram capacit
y
20 Kste
ps
N
u
m
be
r
o
f
tas
k
s
288 (32 c
y
clic tasks and 256 interru
p
t tasks
)
Scheduled interrupt tasks: 1 (interrupt task No. 2, fixed)
In
p
ut interru
p
t tasks: 8 (interru
p
t task No. 140 to 147, fixed), 6 for Y CPU Units
Hi
g
h-speed counter interrupt tasks: 256 (interrupt task No. 0 to 255
)
M
a
xim
u
m
sub
r
ou
tin
e
n
u
m
ber
2
56
Maximum
j
um
p
numbe
r
2
56
I
/
O
a
r
eas
(
See
W
o
rk
b
i
ts
TR Ar
ea
In
p
ut bit
s
1,600 bits (100 words): CIO 0.00 to CIO 99.15 (The 24 built-in in
p
uts are allocated in CIO 0.00 to CIO 0.11 and CIO 1.00 to CIO 1.11.
)
Out
p
ut bit
s
1,600 bits (100 words): CIO 100.00 to CIO 199.15 (The 16 built-in out
p
uts are allocated in CIO 100.00 to CIO 100.07 and CIO 101.00 to CIO 101.07.
)
Built-in Analo
g
In
p
uts
C
I
O
2
00
to
C
I
O
2
03
Built-in Analo
g
Out
p
uts
C
I
O
21
0
to
C
I
O
21
1
Se
ri
a
l PL
C
Link
Ar
ea
1
,
440 bits (90 words): CIO 3100.00 to CIO 3189.15 (CIO 3100 to CIO 3189
)
8
,
192 bits (512 words): W000.00 to W511.15 (W0 to W511
)
37
,
504 bits (2
,
344 words): CIO 3800.00 to CIO 6143.15 (CIO 3800 to CIO 6143
)
1
6
b
i
ts
: TR
0
to
TR1
5
Holdin
g
Are
a
8
,
192 bits (512 words): H0.00 to H511.15 (H0 to H511
)
AR Ar
ea
Read-onl
y
(Write-
p
rohibited): 7168 bits (448 words): A0.00 to A447.15 (A0 to A447
)
Read
/
Write: 8192 bits
(
512 words
)
: A448.00 to A959.15
(
A448 to A959
)
Tim
e
r
s
4
,
096 bits: T0 to T409
5
Cou
n
te
r
s
4
,
096 bits: C0 to C409
5
DM Area
(
See note.
)
3
2 Kw
o
r
ds
: D
0
to
D
3
27
67
Data Re
g
ister Are
a
16 re
g
isters (16 bits): DR0 to DR1
5
Index Re
g
ister Are
a
6 re
g
isters (16 bits): IR0 to IR1
5
Task Fla
g
Are
a
32 fla
g
s (32 bits): TK0000 to TK0031
Trace Memor
y
4,000 words (500 sam
p
les for the trace data maximum of 31 bits and 6 words.
)
Memor
y
Cassette A special Memory Cassette (CP1W-ME05M) can be mounted. Note: Can be used for pro
g
ram backups and auto-bootin
g.
C
l
oc
k f
u
n
ct
i
on
Su
pp
orted. Accurac
y
(monthl
y
deviation):
–
–
0.5 min (ambient tem
p
erature: 5
5
°
C)
,
–
°
–
°
C
)
Co
mm
u
ni
cat
i
o
n
s
f
u
n
ct
i
o
n
s
Batter
y
service lif
e
5
y
ears at 2
5
°
C. (Use the re
p
lacement batter
y
within two
y
ears of manufacture.)
N
ote
Memor
y
backu
p
Flash memory: User pro
g
rams, parameters (such as the PLC Setup), comment data, and the entire DM Area can be saved to flash memory as initial values.
Battery backup: The Holdin
g
Area, DM Area, and counter values (fla
g
s, PV) are backed up by a battery
.
XA CPU Units: CP1H-XA -
X CPU Units: CP1H-X -
Y CPU Units: CP1H-Y -
I
tem
Built-in in
p
ut terminal
s
40 (24 in
p
uts, 16 out
p
uts
)
N
u
m
be
r
o
f
co
nn
ectab
l
e
Ex
p
ansion (I/O) Unit
s
Interrupt input
s
Interru
p
t in
p
uts counter
m
ode
Quick-res
p
onse in
p
uts
Scheduled interru
p
t
s
320 (40 built in + 40
p
er Ex
p
ansion (I/O) Unit x 7 Units
)
8 in
p
uts (Shared b
y
the external interru
p
t in
p
uts (counter mode) an
d
the
q
uick-res
p
onse in
p
uts.
)
8 in
p
uts (Res
p
onse fre
q
uenc
y
: 5 kHz max. for all interru
p
t in
p
uts), 16 bit
s
8
p
oints (Min. in
p
ut
p
ulse width: 50
µ
s max.
)
1
Hi
g
h-speed counter
s
4 in
p
uts: Differential
p
hases (4x), 50 kHz or
Sin
g
le-phase (pulse plus direction, up/down, increment), 100 kH
z
Value ran
g
e: 32 bits, Linear mode or rin
g
mod
e
Interrupts: Tar
g
et value comparison or ran
g
e compariso
n
Pulse out
p
uts (models
with transistor out
p
uts
onl
y)
Tra
p
ezoidal or S-curve acceleration and deceleration (Dut
y
ratio: 50% fixed
)
2 out
p
uts, 1 Hz to 100 kHz (CCW/CW or
p
ulse
p
lus direction
)
2 out
p
uts, 1 Hz to 30 kHz (CCW/CW or
p
ulse
p
lus direction
)
PWM outputs :(Duty ratio: 0.0% to 100.0% (Unit: 0.1%)
)
2 out
p
uts, 0.1 to 1 kHz (Accurac
y
:
±
5% at 1 kHz
)
Built-in analo
g
I/
O
te
rmin
a
l
s
4 analo
g
inputs and 2 analo
g
output
s
(Refer to se
p
arate detailed s
p
ecifications.
)
Analo
g
contro
l
1 (Settin
g
ran
g
e: 0 to 255
)
External analo
g
inpu
t
1 input (Resolution: 1/256, Input ran
g
e: 0 to 10 V
)
Tra
p
ezoidal or S-curve acceleration and deceleration
(Dut
y
ratio: 50% fixed
)
2 out
p
uts, 1 Hz to 1 MHz (CCW/CW or
p
ulse
p
lus direction
)
2 outputs, 1 Hz to 30 kHz (CCW/CW or pulse plus direction
)
PWM out
p
uts :(Dut
y
ratio: 0.0% to 100.0% (Unit: 0.1%)
)
2 out
p
uts, 0.1 to 1 kHz (Accurac
y
:
±
5% at 1 kHz
)
N
o
n
e
2 inputs: Differential phases (4x), 500 kHz or Sin
g
le-phase, 1 MHz an
d
2 inputs: Differential phases (4x), 50 kHz or Sin
g
le-phase (pulse plus
direction, u
p
/down, increment), 100 kH
z
Value ran
g
e: 32 bits, Linear mode or rin
g
mod
e
Interrupts: Tar
g
et value comparison or ran
g
e compariso
n
300 (20 built in + 40
p
er Ex
p
ansion (I/O) Unit x 7 Units)
6 in
p
uts (Shared b
y
the external interru
p
t in
p
ut
s
(counter mode) and the
q
uick-res
p
onse in
p
uts.
)
6 in
p
uts (Res
p
onse fre
q
uenc
y
: 5 kHz max.
for all interru
p
t in
p
uts), 16 bit
s
6
p
oints (Min. in
p
ut
p
ulse width: 50
µ
s max.
)
20 (12 in
p
uts, 8 out
p
uts
)
Line-driver in
p
uts: Two axes for
p
hases A, B, and
Z
Line-driver out
p
uts: Two axes for CW and CC
W
XA CPU Units: CP1H-XA -
X CPU Units: CP1H-X -
CY CPU Units: CP1H-Y -
Specifications
CPU Unit S
p
ecification
s
Serial Communications S
p
ecification
s
Analog I/O Specifications (CP1H-XA CPU Units Only
)
Host Link, No-
p
rotocol, NT Link (1: N), Serial PLC Link (See note.),
Serial Gatewa
y
(Com
p
oWa
y
/F master, Modbus-RTU master),
Modbus-RTU eas
y
master functio
n
Host Link, No-
p
rotocol, NT Link (1: N), Serial PLC Link (See note.),
Serial Gatewa
y
(Com
p
oWa
y
/F master, Modbus-RTU master),
Modbus-RTU eas
y
master functio
n
CO
MM
CO
MM

Omron Sysmac CP1H Specifications

General

Brand	Omron
Model	Sysmac CP1H
Category	Controller
Language	English