Onkyo TX-SR502E - Page 13

IC BLOCK DIAGRAM AND TERMINAL DESCRIPTIONS-3
Q291: BU4053B (Triple 2- channel analog multiplexer/ demultiplexer)
BLOCK DIAGRAM
TX-SR502/E/8250/HT-R520
TRUTH TABLE
VDD (16)
INH (6)
B (10)
A (11)
C (9)
VSS (8)
VEE (7)
Z0 (5)
Z1 (3)
(4) Z
Y0 (2)
Y1 (1)
(15) Y
X0 (12)
X1 (13)
(14) X
LEVEL
CONVERTER
BINARY TO 1of 2
DECODER WITH INH
INH
L
L
L
L
A
L
H
L
H
B
L
L
H
H
C
L
L
L
L
ON SWITCH
X
0 Y0 Z0
X1 Y0 Z0
X0 Y1 Z0
X1 Y1 Z0
LLLH X0 Y0 Z1
LHLH X1 Y0 Z1
LLHH X0 Y1 Z1
LHHH X1 Y1 Z1
H X X X NONE
X:lrrelevant