Philips LX9000R - Block Diagrams

EN 616.LX9000RBlock & Wiring Diagrams
FRONT
Analog input
DIGITAL PCB 1.5
VSM
Stream
Manager
SDRAM
MPEG VIDEO
ENCODING
EMPRESS
SDRAM
FLASH 4MBDRAM
VIDEO INPUT
PROCESSING
MPEG
AV
DECODER
+ HOST
(Sti5519)
2MB
SDRAM
ANAL.VIDEO
DIG. AUDIO
VSM_UART1
IRESET_DIG
CVBS-RGB-Y/C
RS232
SERVICE
AUDIO PCM I2S
SPDIF
AE_WCLK
AE_BCLK
AD_DATAI
OPT_IN
COAX_IN
MUTEN
AD_ACLK
AUDIO ENCODER I2S
YUV-YCVBS/C
ANALOG AUDIO L/R
ANALOG AUDIO VIDEO
BE_FAN
CVBS_OUT_B
C_OUT_B
Y_OUT_B
R_OUT_B
G_OUT_B
B_OUT_B
V_IN U_IN
Y_IN
C_IN
CVBS_Y_IN
RESETN_BE
BE_LOADN
S2BS2B
I2S
FRONT-END I2S
FRONT-END I2S or //
9
DVD & RW ENGINE
TRAY CONTROL
SERVO
READ
WRITE
DISC
PSU
INFRA RED
EYE
DISPLAY & CONTROL
PSU
IPOR_DC
I2C
2
CLOCK &
BACKUP
TUNER
INPUT/OUTPUT
PROCESSING &
SOURCE
SELECTION
DAC
CONTROL
uP
P50
FAN
12V
DC
OPTIONAL
INTELLIGENT
CONTROL
ANALOG BOARD
SCART II
AUX-
I/O
SCARTI
TO TV
- I/O
AUDIO DIGITAL
7
DATA
&CONTROL
LASER
EMI BUS
+12Vstby
-Vgnstby
SCL
SDA
INT POR_DC 5STBY
1 2 4 6
8
2
1
AFCRI
AFCLI
CVBSFIN
CFIN
YFIN
3
4
5
7
8
9
1900
1402
1947
1942
1960
1947
1986
1900
1943
1901
1406
42853910
1602
1600
1601
1501
4
1100
+
1101
1234567
+3V3 +5V GND GND GND +4V6E -5V +12V
8
PSU
1 2 4 6
8
1234567
+3V3 +3V3 +3V3 +3V3 GND GND GND ION +5V +12V
8
1
1000
91011
GND
-5V
12
S-VIDEO
CVBS
AUDIO R
AUDIO L
AFCRI
ANA_R
ANA_L
AFCLI
CVBSFIN
8SW
CFIN
YFIN
AUDIO L/R
5
ANTENNA INPUT
TV OUT
ADC
DIG.VIDEO
VIDEO MPEG2
AUDIO MPEG1
1
2
3
4
5
6
7
8
9
1
4
12
14
16
18
20
22
110
20
21
18
2
4
3
7
9
11
12
14
22 20 18 16 14
POWER
OPEN/CLOSE
PLAY
STOP
RECORD
REC-MODE
SOURCE
VOLUME
FRONT PROCESSOR
AD_DATAO
AD_WCLK
AD_BCLK
uP SUB BOARD
10
Block diagram DVD+RW part LX9000R, 230703
BLOCK DIAGRAM
DVD + RW part
FRONT
Digital Video input
IEEE 1394
+3V3
+5V
4
1901
1500
1501
+12V
DV_VS
DV_CLK
VSM_UART2
YUV(7:0)
4
4
60
DVIO 1.8
PHY
LINK
SDRAM
WRAPPER
DV CODEC
AUDIO DAC
(DATA+CONTROL+PSU)
A: DC, 500mV/Div
10us/Div
A_YCVBS F4709
A: DC, 200mV/Div
10us/Div
D_CVBS F4712
A: DC, 200mV/Div:
10us/Div
D_Y F4714
2V / div AC 10us / div
2V / div AC 200ns / div
AD_WCLK; AE_WCLK
AD_BCLK; AE_BCLK
2V / div AC 50ns / div
AD_ACLK
D_C F4716
A: DC, 200mV/Div
10us/Div
A: DC, 200mV/Div
10us/Div
A: DC, 200mV/Div
10us/Div
D_R F4718
D_G F4720
A: DC, 200mV/Div
10us/Div
D_B F4722
F4712
F4714
F4716
F4718
F4720
F4722
AE_xCLK
AD_xCLK
F4709
6001