Quectel BG77 - Page 23

LPWA Module Series
BG77 Hardware Design
BG77_Hardware_Design 19 / 76
No.
USB_VBUS 12 AI USB detection
V
IH
max=1.8V
V
IH
min=1.3V
USB_DP 11 IO
USB differential
data bus (+)
Compliant with USB
2.0 standard
specification.
Require differential
impedance of 90Ω.
USB_DM 10 IO
USB differential
data bus (-)
USB_VDDA_3P3 42 PI
Power for USB
PHY circuit
Vnorm=3.3V
EXT_PWR_EN 64 DO
External LDO
enable of USB
V
OL
max=0.45V
V
OH
min=1.35V
1.8V power domain.
(U)SIM Interface
Pin Name
Pin
No.
I/O Description DC Characteristics Comment
USIM_DET 44 DI
(U)SIM card
insertion
detection
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep this
pin open.
The pin function is
under development.
USIM_VDD 16 PO
Power supply
for (U)SIM card
Vmax=1.9V
Vmin=1.7V
Only 1.8V (U)SIM
card is supported.
USIM_RST 15 DO
Reset signal of
(U)SIM card
V
OL
max=0.45V
V
OH
min=1.35V
1.8V power domain.
USIM_DATA 14 IO
Data signal of
(U)SIM card
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
V
OL
max=0.45V
V
OH
min=1.35V
1.8V power domain.
USIM_CLK 13 DO
Clock signal of
(U)SIM card
V
OL
max=0.45V
V
OH
min=1.35V
1.8V power domain.
USIM_GND 65
Specified
ground for
(U)SIM card
Main UART Interface
Pin Name
Pin
No.
I/O Description DC Characteristics Comment
DTR 62 DI
Data terminal
ready. Sleep
mode control.
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
1.8V power domain.
If unused, keep this
pin open.