Quectel BG77 - Power Saving Modes

LPWA Module Series
BG77 Hardware Design
BG77_Hardware_Design 21 / 76
PCM Interface*
Pin Name
Pin
No.
I/O Description DC Characteristics Comment
PCM_CLK 3 DO
PCM clock
output
V
OL
max=0.45V
V
OH
min=1.35V
1.8V power domain.
If unused, keep this
pin open.
PCM_SYNC 35 DO
PCM frame
synchronization
output
V
OL
max=0.45V
V
OH
min=1.35V
1.8V power domain.
If unused, keep this
pin open.
PCM_DIN 2 DI
PCM data input
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep this
pin open.
PCM_DOUT 34 DO
PCM data
output
V
OL
max=0.45V
V
OH
min=1.35V
1.8V power domain.
If unused, keep this
pin open.
I2C Interface*
Pin Name
Pin
No.
I/O Description DC Characteristics Comment
I2C_SCL 37 OD
I2C serial clock.
Used for
external codec.
External pull-up
resistor is required.
1.8V only.
If unused, keep this
pin open.
I2C_SDA 5 OD
I2C serial data.
Used for
external codec.
External pull-up
resistor is required.
1.8V only.
If unused, keep this
pin open.
Antenna Interfaces
Pin Name
Pin
No.
I/O Description DC Characteristics Comment
ANT_MAIN 26 IO
Main antenna
interface
50Ω impedance
ANT_GNSS 32 AI
GNSS antenna
interface
50Ω impedance.
If unused, keep this
pin open.
SPI Interface*
Pin Name
Pin
No.
I/O Description
DC Characteristics
Comment